From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH] drm/i915: Check for driver readyness before handling an underrun interrupt Date: 28 Feb 2015 11:16:40 -0800 Message-ID: References: <1424965982-32678-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id EE2C86E3E6 for ; Sat, 28 Feb 2015 11:16:41 -0800 (PST) In-Reply-To: <1424965982-32678-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, chris@chris-wilson.co.uk List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA1ODQyCi0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgMjgyLzI4MiAgICAgICAgICAgICAgMjgyLzI4MgpJTEsgICAgICAgICAgICAgICAgIC0x ICAgICAgICAgICAgICAzMDgvMzA4ICAgICAgICAgICAgICAzMDcvMzA4ClNOQiAgICAgICAgICAg ICAgICAgLTEgICAgICAgICAgICAgIDMyNi8zMjYgICAgICAgICAgICAgIDMyNS8zMjYKSVZCICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDM3OS8zNzkgICAgICAgICAgICAgIDM3OS8z NzkKQllUICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDI5NC8yOTQgICAgICAgICAg ICAgIDI5NC8yOTQKSFNXICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDM4Ny8zODcg ICAgICAgICAgICAgIDM4Ny8zODcKQkRXICAgICAgICAgICAgICAgICAtMSAgICAgICAgICAgICAg MzE2LzMxNiAgICAgICAgICAgICAgMzE1LzMxNgotLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tRGV0YWlsZWQtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tClBs YXRmb3JtICBUZXN0ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBkcm0taW50ZWwtbmln aHRseSAgICAgICAgICBTZXJpZXMgQXBwbGllZAoqSUxLICBpZ3Rfa21zX2ZsaXBfcmNzLXdmX3Zi bGFuay12cy1kcG1zLWludGVycnVwdGlibGUgICAgICBQQVNTKDQpICAgICAgRE1FU0dfV0FSTigx KVBBU1MoMSkKKlNOQiAgaWd0X2ttc19wbGFuZV9wbGFuZS1wYW5uaW5nLWJvdHRvbS1yaWdodC1w aXBlLUItcGxhbmUtMSAgICAgIFBBU1MoMykgICAgICBUSU1FT1VUKDEpUEFTUygxKQoqQkRXICBp Z3RfZ2VtX2d0dF9ob2cgICAgICBQQVNTKDE1KSAgICAgIERNRVNHX1dBUk4oMSlQQVNTKDEpCk5v dGU6IFlvdSBuZWVkIHRvIHBheSBtb3JlIGF0dGVudGlvbiB0byBsaW5lIHN0YXJ0IHdpdGggJyon Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdm eCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==