From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH] drm/i915: Add polish to VLV WM shift+mask operations Date: 11 Mar 2015 08:02:25 -0700 Message-ID: References: <1425996988-5747-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B76486E1B2 for ; Wed, 11 Mar 2015 08:03:00 -0700 (PDT) In-Reply-To: <1425996988-5747-1-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, ville.syrjala@linux.intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA1OTI2Ci0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgIC0zICAgICAgICAg ICAgICAyODEvMjgxICAgICAgICAgICAgICAyNzgvMjgxCklMSyAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAzMDgvMzA4ICAgICAgICAgICAgICAzMDgvMzA4ClNOQiAgICAgICAgICAg ICAgICAgLTEgICAgICAgICAgICAgIDI4NC8yODQgICAgICAgICAgICAgIDI4My8yODQKSVZCICAg ICAgICAgICAgICAgICAtMSAgICAgICAgICAgICAgMzc1LzM3NSAgICAgICAgICAgICAgMzc0LzM3 NQpCWVQgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgMjk0LzI5NCAgICAgICAgICAg ICAgMjk0LzI5NApIU1cgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgMzg0LzM4NCAg ICAgICAgICAgICAgMzg0LzM4NApCRFcgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg MzE1LzMxNSAgICAgICAgICAgICAgMzE1LzMxNQotLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tRGV0YWlsZWQtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tClBs YXRmb3JtICBUZXN0ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBkcm0taW50ZWwtbmln aHRseSAgICAgICAgICBTZXJpZXMgQXBwbGllZAoqUE5WICBpZ3RfZ2VuM19yZW5kZXJfbWl4ZWRf YmxpdHMgICAgICBQQVNTKDEpICAgICAgRkFJTCgyKQogUE5WICBpZ3RfZ2VuM19yZW5kZXJfdGls ZWR4X2JsaXRzICAgICAgRkFJTCgxKVBBU1MoMSkgICAgICBGQUlMKDEpCiBQTlYgIGlndF9nZW4z X3JlbmRlcl90aWxlZHlfYmxpdHMgICAgICBGQUlMKDEpUEFTUygxKSAgICAgIEZBSUwoMSkKKlNO QiAgaWd0X2dlbV9mbGlua19iYWQtZmxpbmsgICAgICBQQVNTKDEpICAgICAgRE1FU0dfV0FSTigx KVBBU1MoMSkKKklWQiAgaWd0X2dlbV9zdG9yZWR3X2JhdGNoZXNfbG9vcF9ub3JtYWwgICAgICBQ QVNTKDEpICAgICAgRE1FU0dfV0FSTigxKVBBU1MoMSkKTm90ZTogWW91IG5lZWQgdG8gcGF5IG1v cmUgYXR0ZW50aW9uIHRvIGxpbmUgc3RhcnQgd2l0aCAnKicKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1n ZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFp bG1hbi9saXN0aW5mby9pbnRlbC1nZngK