* [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area
@ 2015-05-12 7:35 Mika Kuoppala
2015-05-12 7:35 ` [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm Mika Kuoppala
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Mika Kuoppala @ 2015-05-12 7:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
The check for start + length >= total_vm_size is
wrong since start + length can be exactly the size of
the vm.
Fix the check to allow allocation to boundary.
Fixes a regression in commit 4dd738e9cd79
("drm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_directories")
Testcase: igt/gem_evict_everything/swapping-interruptible
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90399
Tested-by: Lu Hua <huax.lu@intel.com>
Cc: Chris Wilson <chris@chris.wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e3bcc3b..17b7df0 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -757,7 +757,7 @@ static int gen8_ppgtt_alloc_page_directories(struct i915_hw_ppgtt *ppgtt,
WARN_ON(!bitmap_empty(new_pds, GEN8_LEGACY_PDPES));
/* FIXME: upper bound must not overflow 32 bits */
- WARN_ON((start + length) >= (1ULL << 32));
+ WARN_ON((start + length) > (1ULL << 32));
gen8_for_each_pdpe(pd, pdp, start, length, temp, pdpe) {
if (pd)
--
1.9.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm. 2015-05-12 7:35 [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Mika Kuoppala @ 2015-05-12 7:35 ` Mika Kuoppala 2015-05-12 8:39 ` Daniel Vetter 2015-05-12 7:35 ` [PATCH 3/3] drm/i915/gtt: Check va range against vm size Mika Kuoppala 2015-05-12 8:36 ` [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Daniel Vetter 2 siblings, 1 reply; 6+ messages in thread From: Mika Kuoppala @ 2015-05-12 7:35 UTC (permalink / raw) To: intel-gfx We can have exactly 4GB sized ppgtt with 32bit system. size_t is inadequate for this. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/char/agp/intel-gtt.c | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++++---- drivers/gpu/drm/i915/i915_gem_gtt.h | 6 +++--- include/drm/intel-gtt.h | 2 +- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 0b4188b..2f0396c 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -1408,7 +1408,7 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, } EXPORT_SYMBOL(intel_gmch_probe); -void intel_gtt_get(size_t *gtt_total, size_t *stolen_size, +void intel_gtt_get(u64 *gtt_total, size_t *stolen_size, phys_addr_t *mappable_base, unsigned long *mappable_end) { *gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT; diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index adbbdda..44175f6 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -474,9 +474,9 @@ static int i915_gem_object_info(struct seq_file *m, void* data) seq_printf(m, "%u fault mappable objects, %zu bytes\n", count, size); - seq_printf(m, "%zu [%lu] gtt total\n", + seq_printf(m, "%llu [%llu] gtt total\n", dev_priv->gtt.base.total, - dev_priv->gtt.mappable_end - dev_priv->gtt.base.start); + (u64)dev_priv->gtt.mappable_end - dev_priv->gtt.base.start); seq_putc(m, '\n'); print_batch_pool_stats(m, dev_priv); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 17b7df0..525d154 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2347,7 +2347,7 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv) } static int gen8_gmch_probe(struct drm_device *dev, - size_t *gtt_total, + u64 *gtt_total, size_t *stolen, phys_addr_t *mappable_base, unsigned long *mappable_end) @@ -2395,7 +2395,7 @@ static int gen8_gmch_probe(struct drm_device *dev, } static int gen6_gmch_probe(struct drm_device *dev, - size_t *gtt_total, + u64 *gtt_total, size_t *stolen, phys_addr_t *mappable_base, unsigned long *mappable_end) @@ -2446,7 +2446,7 @@ static void gen6_gmch_remove(struct i915_address_space *vm) } static int i915_gmch_probe(struct drm_device *dev, - size_t *gtt_total, + u64 *gtt_total, size_t *stolen, phys_addr_t *mappable_base, unsigned long *mappable_end) @@ -2514,7 +2514,7 @@ int i915_gem_gtt_init(struct drm_device *dev) gtt->base.dev = dev; /* GMADR is the PCI mmio aperture into the global GTT. */ - DRM_INFO("Memory usable by graphics device = %zdM\n", + DRM_INFO("Memory usable by graphics device = %lluM\n", gtt->base.total >> 20); DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20); DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 0d46dd2..5786c7d 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -233,8 +233,8 @@ struct i915_address_space { struct drm_mm mm; struct drm_device *dev; struct list_head global_link; - unsigned long start; /* Start offset always 0 for dri2 */ - size_t total; /* size addr space maps (ex. 2GB for ggtt) */ + u64 start; /* Start offset always 0 for dri2 */ + u64 total; /* size addr space maps (ex. 2GB for ggtt) */ struct { dma_addr_t addr; @@ -314,7 +314,7 @@ struct i915_gtt { int mtrr; /* global gtt ops */ - int (*gtt_probe)(struct drm_device *dev, size_t *gtt_total, + int (*gtt_probe)(struct drm_device *dev, u64 *gtt_total, size_t *stolen, phys_addr_t *mappable_base, unsigned long *mappable_end); }; diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h index b08bdad..dbf4105 100644 --- a/include/drm/intel-gtt.h +++ b/include/drm/intel-gtt.h @@ -3,7 +3,7 @@ #ifndef _DRM_INTEL_GTT_H #define _DRM_INTEL_GTT_H -void intel_gtt_get(size_t *gtt_total, size_t *stolen_size, +void intel_gtt_get(u64 *gtt_total, size_t *stolen_size, phys_addr_t *mappable_base, unsigned long *mappable_end); int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm. 2015-05-12 7:35 ` [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm Mika Kuoppala @ 2015-05-12 8:39 ` Daniel Vetter 0 siblings, 0 replies; 6+ messages in thread From: Daniel Vetter @ 2015-05-12 8:39 UTC (permalink / raw) To: Mika Kuoppala; +Cc: intel-gfx On Tue, May 12, 2015 at 10:35:09AM +0300, Mika Kuoppala wrote: > We can have exactly 4GB sized ppgtt with 32bit system. > size_t is inadequate for this. > > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> A quick grep shows that there's still lots of size_t in gem code (i915_gem.c, i915_gem_gtt.c and parts of i915_debugfs.c). I think we need to convert them all to avoid overflow issues. -Daniel > --- > drivers/char/agp/intel-gtt.c | 2 +- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- > drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++++---- > drivers/gpu/drm/i915/i915_gem_gtt.h | 6 +++--- > include/drm/intel-gtt.h | 2 +- > 5 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c > index 0b4188b..2f0396c 100644 > --- a/drivers/char/agp/intel-gtt.c > +++ b/drivers/char/agp/intel-gtt.c > @@ -1408,7 +1408,7 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, > } > EXPORT_SYMBOL(intel_gmch_probe); > > -void intel_gtt_get(size_t *gtt_total, size_t *stolen_size, > +void intel_gtt_get(u64 *gtt_total, size_t *stolen_size, > phys_addr_t *mappable_base, unsigned long *mappable_end) > { > *gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT; > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index adbbdda..44175f6 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -474,9 +474,9 @@ static int i915_gem_object_info(struct seq_file *m, void* data) > seq_printf(m, "%u fault mappable objects, %zu bytes\n", > count, size); > > - seq_printf(m, "%zu [%lu] gtt total\n", > + seq_printf(m, "%llu [%llu] gtt total\n", > dev_priv->gtt.base.total, > - dev_priv->gtt.mappable_end - dev_priv->gtt.base.start); > + (u64)dev_priv->gtt.mappable_end - dev_priv->gtt.base.start); > > seq_putc(m, '\n'); > print_batch_pool_stats(m, dev_priv); > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 17b7df0..525d154 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -2347,7 +2347,7 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv) > } > > static int gen8_gmch_probe(struct drm_device *dev, > - size_t *gtt_total, > + u64 *gtt_total, > size_t *stolen, > phys_addr_t *mappable_base, > unsigned long *mappable_end) > @@ -2395,7 +2395,7 @@ static int gen8_gmch_probe(struct drm_device *dev, > } > > static int gen6_gmch_probe(struct drm_device *dev, > - size_t *gtt_total, > + u64 *gtt_total, > size_t *stolen, > phys_addr_t *mappable_base, > unsigned long *mappable_end) > @@ -2446,7 +2446,7 @@ static void gen6_gmch_remove(struct i915_address_space *vm) > } > > static int i915_gmch_probe(struct drm_device *dev, > - size_t *gtt_total, > + u64 *gtt_total, > size_t *stolen, > phys_addr_t *mappable_base, > unsigned long *mappable_end) > @@ -2514,7 +2514,7 @@ int i915_gem_gtt_init(struct drm_device *dev) > gtt->base.dev = dev; > > /* GMADR is the PCI mmio aperture into the global GTT. */ > - DRM_INFO("Memory usable by graphics device = %zdM\n", > + DRM_INFO("Memory usable by graphics device = %lluM\n", > gtt->base.total >> 20); > DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20); > DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20); > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h > index 0d46dd2..5786c7d 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.h > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h > @@ -233,8 +233,8 @@ struct i915_address_space { > struct drm_mm mm; > struct drm_device *dev; > struct list_head global_link; > - unsigned long start; /* Start offset always 0 for dri2 */ > - size_t total; /* size addr space maps (ex. 2GB for ggtt) */ > + u64 start; /* Start offset always 0 for dri2 */ > + u64 total; /* size addr space maps (ex. 2GB for ggtt) */ > > struct { > dma_addr_t addr; > @@ -314,7 +314,7 @@ struct i915_gtt { > int mtrr; > > /* global gtt ops */ > - int (*gtt_probe)(struct drm_device *dev, size_t *gtt_total, > + int (*gtt_probe)(struct drm_device *dev, u64 *gtt_total, > size_t *stolen, phys_addr_t *mappable_base, > unsigned long *mappable_end); > }; > diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h > index b08bdad..dbf4105 100644 > --- a/include/drm/intel-gtt.h > +++ b/include/drm/intel-gtt.h > @@ -3,7 +3,7 @@ > #ifndef _DRM_INTEL_GTT_H > #define _DRM_INTEL_GTT_H > > -void intel_gtt_get(size_t *gtt_total, size_t *stolen_size, > +void intel_gtt_get(u64 *gtt_total, size_t *stolen_size, > phys_addr_t *mappable_base, unsigned long *mappable_end); > > int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] drm/i915/gtt: Check va range against vm size 2015-05-12 7:35 [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Mika Kuoppala 2015-05-12 7:35 ` [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm Mika Kuoppala @ 2015-05-12 7:35 ` Mika Kuoppala 2015-05-15 9:22 ` shuang.he 2015-05-12 8:36 ` [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Daniel Vetter 2 siblings, 1 reply; 6+ messages in thread From: Mika Kuoppala @ 2015-05-12 7:35 UTC (permalink / raw) To: intel-gfx Check the allocation area against the known end of address space instead of against fixed value. v2: Return ENODEV on internal bugs (Chris) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 525d154..dd6aace 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -756,9 +756,6 @@ static int gen8_ppgtt_alloc_page_directories(struct i915_hw_ppgtt *ppgtt, WARN_ON(!bitmap_empty(new_pds, GEN8_LEGACY_PDPES)); - /* FIXME: upper bound must not overflow 32 bits */ - WARN_ON((start + length) > (1ULL << 32)); - gen8_for_each_pdpe(pd, pdp, start, length, temp, pdpe) { if (pd) continue; @@ -848,7 +845,10 @@ static int gen8_alloc_va_range(struct i915_address_space *vm, * actually use the other side of the canonical address space. */ if (WARN_ON(start + length < start)) - return -ERANGE; + return -ENODEV; + + if (WARN_ON(start + length > ppgtt->base.total)) + return -ENODEV; ret = alloc_gen8_temp_bitmaps(&new_page_dirs, &new_page_tables); if (ret) @@ -1290,7 +1290,7 @@ static void gen6_initialize_pt(struct i915_address_space *vm, } static int gen6_alloc_va_range(struct i915_address_space *vm, - uint64_t start, uint64_t length) + uint64_t start_in, uint64_t length_in) { DECLARE_BITMAP(new_page_tables, I915_PDES); struct drm_device *dev = vm->dev; @@ -1298,11 +1298,15 @@ static int gen6_alloc_va_range(struct i915_address_space *vm, struct i915_hw_ppgtt *ppgtt = container_of(vm, struct i915_hw_ppgtt, base); struct i915_page_table *pt; - const uint32_t start_save = start, length_save = length; + uint32_t start, length, start_save, length_save; uint32_t pde, temp; int ret; - WARN_ON(upper_32_bits(start)); + if (WARN_ON(start_in + length_in > ppgtt->base.total)) + return -ENODEV; + + start = start_save = start_in; + length = length_save = length_in; bitmap_zero(new_page_tables, I915_PDES); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 3/3] drm/i915/gtt: Check va range against vm size 2015-05-12 7:35 ` [PATCH 3/3] drm/i915/gtt: Check va range against vm size Mika Kuoppala @ 2015-05-15 9:22 ` shuang.he 0 siblings, 0 replies; 6+ messages in thread From: shuang.he @ 2015-05-15 9:22 UTC (permalink / raw) To: shuang.he, ethan.gao, intel-gfx, mika.kuoppala Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) Task id: 6386 -------------------------------------Summary------------------------------------- Platform Delta drm-intel-nightly Series Applied PNV 276/276 276/276 ILK 302/302 302/302 SNB -1 314/314 313/314 IVB 338/338 338/338 BYT 286/286 286/286 BDW -1 320/320 319/320 -------------------------------------Detailed------------------------------------- Platform Test drm-intel-nightly Series Applied SNB igt@pm_rpm@dpms-mode-unset-non-lpsp DMESG_WARN(13)PASS(1) DMESG_WARN(1) (dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x *BDW igt@gem_gtt_hog PASS(5) DMESG_WARN(1) (dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_display.c:#assert_plane[i915]()@WARNING:.* at .* assert_plane assertion_failure@assertion failure WARNING:at_drivers/gpu/drm/drm_irq.c:#drm_wait_one_vblank[drm]()@WARNING:.* at .* drm_wait_one_vblank+0x Note: You need to pay more attention to line start with '*' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area 2015-05-12 7:35 [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Mika Kuoppala 2015-05-12 7:35 ` [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm Mika Kuoppala 2015-05-12 7:35 ` [PATCH 3/3] drm/i915/gtt: Check va range against vm size Mika Kuoppala @ 2015-05-12 8:36 ` Daniel Vetter 2 siblings, 0 replies; 6+ messages in thread From: Daniel Vetter @ 2015-05-12 8:36 UTC (permalink / raw) To: Mika Kuoppala; +Cc: intel-gfx, Chris Wilson On Tue, May 12, 2015 at 10:35:08AM +0300, Mika Kuoppala wrote: > The check for start + length >= total_vm_size is > wrong since start + length can be exactly the size of > the vm. > > Fix the check to allow allocation to boundary. > > Fixes a regression in commit 4dd738e9cd79 > ("drm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_directories") > > Testcase: igt/gem_evict_everything/swapping-interruptible > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90399 > Tested-by: Lu Hua <huax.lu@intel.com> > Cc: Chris Wilson <chris@chris.wilson.co.uk> > Cc: Dave Gordon <david.s.gordon@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Michel Thierry <michel.thierry@intel.com> > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index e3bcc3b..17b7df0 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -757,7 +757,7 @@ static int gen8_ppgtt_alloc_page_directories(struct i915_hw_ppgtt *ppgtt, > WARN_ON(!bitmap_empty(new_pds, GEN8_LEGACY_PDPES)); > > /* FIXME: upper bound must not overflow 32 bits */ > - WARN_ON((start + length) >= (1ULL << 32)); > + WARN_ON((start + length) > (1ULL << 32)); > > gen8_for_each_pdpe(pd, pdp, start, length, temp, pdpe) { > if (pd) > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-05-15 9:22 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-05-12 7:35 [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Mika Kuoppala 2015-05-12 7:35 ` [PATCH 2/3] drm/i915/gtt: Allow >= 4GB sizes for vm Mika Kuoppala 2015-05-12 8:39 ` Daniel Vetter 2015-05-12 7:35 ` [PATCH 3/3] drm/i915/gtt: Check va range against vm size Mika Kuoppala 2015-05-15 9:22 ` shuang.he 2015-05-12 8:36 ` [PATCH 1/3] drm/i915/gtt: Fix the boundary check for vm area Daniel Vetter
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