From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keith Packard Subject: Re: [Intel-gfx] [PATCH 06/21] drm/i915: Unlock PCH_PP_CONTROL always Date: Fri, 30 Sep 2011 16:14:40 -0700 Message-ID: References: <20110923085243.6e4b7b4c@jbarnes-x220> <1317344993-24945-1-git-send-email-keithp@keithp.com> <1317344993-24945-7-git-send-email-keithp@keithp.com> <20110930170946.GF2859@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha1; protocol="application/pgp-signature" Return-path: In-Reply-To: <20110930170946.GF2859@phenom.ffwll.local> Sender: linux-kernel-owner@vger.kernel.org To: Daniel Vetter Cc: Dave Airlie , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --=-=-= Content-Transfer-Encoding: quoted-printable On Fri, 30 Sep 2011 19:09:46 +0200, Daniel Vetter wrote: > grep shows that we also write to PCH_PP_CONTROL in intel_lvds.c in the > dpms functions - any reasons these two writes are left out? Upon a bit of review: The bspec makes it clear that this write protect key only needs to be written for eDP on DPA -- it's a work-around for a bug where panel power sequencing wouldn't work right. The LVDS code does disable write protect in the _init function, which seems global enough, but misses the resume case. We shouldn't ever need to set this field though; it write protects registers only when the panel is running. We could presumably remove the write protect disable entirely in the LVDS code. So, I think the patch as written is correct. =2D-=20 keith.packard@intel.com --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iD8DBQFOhk1hQp8BWwlsTdMRAo+XAJ9Rr7HxRaCkdshHbI0irxyiTSZ1GwCdGvED YPiHdl4nkRRgn/0Ue4hQy5g= =FdjR -----END PGP SIGNATURE----- --=-=-=--