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From: "naamax.meir" <naamax.meir@linux.intel.com>
To: Vinicius Costa Gomes <vinicius.gomes@intel.com>,
	Jesse Brandeburg <jesse.brandeburg@intel.com>,
	Tony Nguyen <anthony.l.nguyen@intel.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Alexei Starovoitov <ast@kernel.org>,
	Daniel Borkmann <daniel@iogearbox.net>,
	Jesper Dangaard Brouer <hawk@kernel.org>
Cc: intel-wired-lan@lists.osuosl.org
Subject: Re: [Intel-wired-lan] [PATCH iwl-next 2/2] igc: Add support for PTP .getcyclesx64()
Date: Sun, 22 Oct 2023 16:46:16 +0300	[thread overview]
Message-ID: <04d2afbc-af34-4866-b04b-250143a8a837@linux.intel.com> (raw)
In-Reply-To: <20230921-igc-multiple-tstamp-vclock-v2-v1-2-aa0971cb0fe9@intel.com>

On 9/22/2023 04:40, Vinicius Costa Gomes wrote:
> Add support for using Timer 1 (i225/i226 have 4 timer registers) as a
> free-running clock (the "cycles" clock) in addition to Timer 0 (the
> default, "adjustable clock"). The objective is to allow taprio/etf
> offloading to coexist with PTP vclocks.
> 
> Besides the implementation of .getcyclesx64() for i225/i226, to keep
> timestamping working when vclocks are in use, we also need to add
> support for TX and RX timestamping using the free running timer, when
> the requesting socket is bound to a vclock.
> 
> On the RX side, i225/i226 can be configured to store the values of two
> timers in the received packet metadata area, so it's a matter of
> configuring the right registers and retrieving the right timestamp.
> 
> The TX is a bit more involved because the hardware stores a single
> timestamp (with the selected timer in the TX descriptor) into one of
> the timestamp registers.
> 
> Note some changes at how the timestamps are done for RX, the
> conversion and adjustment of timestamps are now done closer to the
> consumption of the timestamp instead of near the reception.
> 
> Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
> ---
>   drivers/net/ethernet/intel/igc/igc.h         | 21 ++++++++++-
>   drivers/net/ethernet/intel/igc/igc_base.h    |  4 ++
>   drivers/net/ethernet/intel/igc/igc_defines.h |  2 +
>   drivers/net/ethernet/intel/igc/igc_main.c    | 55 ++++++++++++++++++++--------
>   drivers/net/ethernet/intel/igc/igc_ptp.c     | 50 +++++++++++++++----------
>   drivers/net/ethernet/intel/igc/igc_regs.h    |  5 +++
>   6 files changed, 101 insertions(+), 36 deletions(-)

Tested-by: Naama Meir <naamax.meir@linux.intel.com>
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      reply	other threads:[~2023-10-22 13:46 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-22  1:40 [Intel-wired-lan] [PATCH iwl-next 0/2] igc: Add support for physical + free-running timers Vinicius Costa Gomes
2023-09-22  1:40 ` [Intel-wired-lan] [PATCH iwl-next 1/2] igc: Simplify setting flags in the TX data descriptor Vinicius Costa Gomes
2023-10-18 18:41   ` naamax.meir
2023-09-22  1:40 ` [Intel-wired-lan] [PATCH iwl-next 2/2] igc: Add support for PTP .getcyclesx64() Vinicius Costa Gomes
2023-10-22 13:46   ` naamax.meir [this message]

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