From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tony Nguyen Date: Fri, 15 May 2020 17:36:35 -0700 Subject: [Intel-wired-lan] [PATCH S43 06/15] ice: Fix bad register reads In-Reply-To: <20200516003644.4658-1-anthony.l.nguyen@intel.com> References: <20200516003644.4658-1-anthony.l.nguyen@intel.com> Message-ID: <20200516003644.4658-6-anthony.l.nguyen@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: intel-wired-lan@osuosl.org List-ID: From: Anirudh Venkataramanan The "ethtool -d" handler reads registers in the ice_regs_dump_list array and returns read values back to the userspace. The register offsets PFINT0_ITR* are not valid as per the specification and reading these causes a "unable to handle kernel paging request" bug in the driver. Remove these registers from ice_regs_dump_list. Signed-off-by: Anirudh Venkataramanan Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/ice/ice_ethtool.c | 3 --- drivers/net/ethernet/intel/ice/ice_hw_autogen.h | 3 --- 2 files changed, 6 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c index 72105d70cead..477ad33e0403 100644 --- a/drivers/net/ethernet/intel/ice/ice_ethtool.c +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c @@ -142,9 +142,6 @@ static const u32 ice_regs_dump_list[] = { QINT_RQCTL(0), PFINT_OICR_ENA, QRX_ITR(0), - PF0INT_ITR_0(0), - PF0INT_ITR_1(0), - PF0INT_ITR_2(0), }; struct ice_priv_flag { diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h index 16ec9bebf4b4..5803bacef129 100644 --- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h +++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h @@ -6,9 +6,6 @@ #ifndef _ICE_HW_AUTOGEN_H_ #define _ICE_HW_AUTOGEN_H_ -#define PF0INT_ITR_0(_i) (0x03000004 + ((_i) * 4096)) -#define PF0INT_ITR_1(_i) (0x03000008 + ((_i) * 4096)) -#define PF0INT_ITR_2(_i) (0x0300000C + ((_i) * 4096)) #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4)) #define QTX_COMM_HEAD(_DBQM) (0x000E0000 + ((_DBQM) * 4)) #define QTX_COMM_HEAD_HEAD_S 0 -- 2.20.1