From: Jacob Keller <jacob.e.keller@intel.com>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [net-next PATCH 1/9] ice: introduce ice_base_incval function
Date: Mon, 11 Oct 2021 14:54:25 -0700 [thread overview]
Message-ID: <20211011215433.1525457-2-jacob.e.keller@intel.com> (raw)
In-Reply-To: <20211011215433.1525457-1-jacob.e.keller@intel.com>
A future change will add additional possible increment values for the
E822 device support. To handle this, we want to look up the increment
value to use instead of hard coding it to the nominal value for E810
devices. Introduce ice_base_incval as a function to get the best nominal
increment value to use.
For now, it just returns the E810 value, but will be refactored in the
future to look up the value based on the device type and configured
clock frequency.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
---
drivers/net/ethernet/intel/ice/ice_ptp.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
index 36c01ba4dd69..71e715c7be4f 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
@@ -685,6 +685,20 @@ static int ice_ptp_write_adj(struct ice_pf *pf, s32 adj)
return ice_ptp_adj_clock(hw, adj);
}
+/**
+ * ice_base_incval - Get base timer increment value
+ * @pf: Board private structure
+ *
+ * Look up the base timer increment value for this device. The base increment
+ * value is used to define the nominal clock tick rate. This increment value
+ * is programmed during device initialization. It is also used as the basis
+ * for calculating adjustments using scaled_ppm.
+ */
+static u64 ice_base_incval(struct ice_pf *pf)
+{
+ return ICE_PTP_NOMINAL_INCVAL_E810;
+}
+
/**
* ice_ptp_adjfine - Adjust clock increment rate
* @info: the driver's PTP info structure
@@ -702,7 +716,7 @@ static int ice_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm)
int neg_adj = 0;
int err;
- incval = ICE_PTP_NOMINAL_INCVAL_E810;
+ incval = ice_base_incval(pf);
if (scaled_ppm < 0) {
neg_adj = 1;
@@ -1826,7 +1840,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf)
}
/* Write the increment time value to PHY and LAN */
- err = ice_ptp_write_incval(hw, ICE_PTP_NOMINAL_INCVAL_E810);
+ err = ice_ptp_write_incval(hw, ice_base_incval(pf));
if (err) {
ice_ptp_unlock(hw);
goto err_exit;
--
2.31.1.331.gb0c09ab8796f
next prev parent reply other threads:[~2021-10-11 21:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 21:54 [Intel-wired-lan] [net-next PATCH 0/9] implement support for PTP on E822 hardware Jacob Keller
2021-10-11 21:54 ` Jacob Keller [this message]
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 2/9] ice: PTP: move setting of tstamp_config Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 3/9] ice: use 'int err' instead of 'int status' in ice_ptp_hw.c Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 4/9] ice: introduce ice_ptp_init_phc function Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 5/9] ice: convert clk_freq capability into time_ref Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 6/9] ice: implement basic E822 PTP support Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 7/9] ice: ensure the hardware Clock Generation Unit is configured Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 8/9] ice: exit bypass mode once hardware finishes timestamp calibration Jacob Keller
2021-10-11 21:54 ` [Intel-wired-lan] [net-next PATCH 9/9] ice: support crosstimestamping on E822 devices if supported Jacob Keller
2021-10-12 0:22 ` Vinicius Costa Gomes
2021-10-12 0:58 ` Keller, Jacob E
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