Re: [Intel-wired-lan] [PATCH net-next] ice: Add low latency Tx timestamp read

[Alexander Lobakin <alexandr.lobakin@intel.com>]

From: Karol Kolacinski <karol.kolacinski@intel.com>
Date: Fri, 22 Jul 2022 17:36:10 +0200

(offtop below)

> E810 products can support low latency Tx timestamp register read.
> This requires usage of threaded IRQ instead of kthread to reduce the
> kthread start latency (spikes up to 20 ms).
> Add a check for the device capability and use the new method if
> supported.
> 
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> ---
>  drivers/net/ethernet/intel/ice/ice_common.c |  4 +
>  drivers/net/ethernet/intel/ice/ice_main.c   | 32 +++++--
>  drivers/net/ethernet/intel/ice/ice_ptp.c    | 47 +++++-----
>  drivers/net/ethernet/intel/ice/ice_ptp.h    |  7 +-
>  drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 98 ++++++++++++++++++---
>  drivers/net/ethernet/intel/ice/ice_ptp_hw.h |  7 ++
>  drivers/net/ethernet/intel/ice/ice_type.h   |  2 +
>  7 files changed, 152 insertions(+), 45 deletions(-)

[...]

> diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h
> index 861b64322959..920c47ddbe8d 100644
> --- a/drivers/net/ethernet/intel/ice/ice_type.h
> +++ b/drivers/net/ethernet/intel/ice/ice_type.h
> @@ -347,6 +347,7 @@ struct ice_ts_func_info {
>  #define ICE_TS_DEV_ENA_M		BIT(24)
>  #define ICE_TS_TMR0_ENA_M		BIT(25)
>  #define ICE_TS_TMR1_ENA_M		BIT(26)
> +#define ICE_TS_LL_TX_TS_READ_M		BIT(28)
>  
>  struct ice_ts_dev_info {
>  	/* Device specific info */
> @@ -359,6 +360,7 @@ struct ice_ts_dev_info {
>  	u8 ena;
>  	u8 tmr0_ena;
>  	u8 tmr1_ena;
> +	u8 ts_ll_read;

Those all are flags, what about converting them to a bitfield/bitmap
(in a separate patch)? 1 byte per bit is a waste. Even though
currently there are 6 bytes accupied (after your addition) and long
(unsigned) is of 8 bytes, more flags here will waste more and more
space.

>  };
>  
>  /* Function specific capabilities */
> -- 
> 2.34.1

Thanks,
Olek
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