From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4629AC7EE2C for ; Mon, 5 Jun 2023 02:29:55 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id EAEE660BCC; Mon, 5 Jun 2023 02:29:54 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp3.osuosl.org EAEE660BCC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=osuosl.org; s=default; t=1685932195; bh=wmcz5uaqeCZ6vvL37uKiemWWfZwwkn5quIHf/3MLsng=; h=From:To:Date:In-Reply-To:References:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=ck0wmOCVgnNZPhQ++lgfnY2nL4B9b8XrN7j1vHJKx0YKmOsDAdo2BwyotZSIji9Nw pFndHngWhl8lBd3Vn/iwLtsQA2Cilv/3OC64HbBMESUNF5L71KYXxrmvegnk1q9EJa QudfdB733cyUYDLNthbMePpn1D+1aakBMe4xD4wwsyRBeZ8ZV9ZPnI0AV3LlRIlIvI BeNmMFKHWOo+AYGkz+Vez/1DAOMq9klUnhECjOu66YDaJMHU08wHsm+4wHBgWRRDh+ t3kqrXGboEhuwv3mBIBwgbo7IkdzLyKpNU+W0PmyypS5tilIqDEvPxn7SPDT2csHjx EpI8nexULltGQ== X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id H0y1bw1XpIcP; Mon, 5 Jun 2023 02:29:53 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by smtp3.osuosl.org (Postfix) with ESMTP id 5E86660BBE; Mon, 5 Jun 2023 02:29:53 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp3.osuosl.org 5E86660BBE Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) by ash.osuosl.org (Postfix) with ESMTP id 6BC2E1BF336 for ; Mon, 5 Jun 2023 02:29:39 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 3D63060BC4 for ; Mon, 5 Jun 2023 02:29:39 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp3.osuosl.org 3D63060BC4 X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MOJOQdO8Nm5t for ; Mon, 5 Jun 2023 02:29:37 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp3.osuosl.org B8E2560BBB Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by smtp3.osuosl.org (Postfix) with ESMTPS id B8E2560BBB for ; Mon, 5 Jun 2023 02:29:37 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6600,9927,10731"; a="358710412" X-IronPort-AV: E=Sophos;i="6.00,217,1681196400"; d="scan'208";a="358710412" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jun 2023 19:29:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10731"; a="1038604713" X-IronPort-AV: E=Sophos;i="6.00,217,1681196400"; d="scan'208";a="1038604713" Received: from dpdk-jf-ntb-v2.sh.intel.com ([10.67.119.16]) by fmsmga005.fm.intel.com with ESMTP; 04 Jun 2023 19:29:36 -0700 From: Junfeng Guo To: intel-wired-lan@lists.osuosl.org Date: Mon, 5 Jun 2023 10:29:09 +0800 Message-Id: <20230605022920.2361266-5-junfeng.guo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230605022920.2361266-1-junfeng.guo@intel.com> References: <20230605022920.2361266-1-junfeng.guo@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685932177; x=1717468177; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IY1aPliZ+UKdMpWUMWge9SQwr75zuNK89szNGqY9oWw=; b=CWeXrjdYrsJpoAuGuDk7PxIlhM1tgOpJeENKWrKEXnSvklOLBD1A7hkB Z4pdlugS8VjSO1KP8/iuoqJVMIS05yEd3qILr5yRvdmWLGpp5yEp/i5H8 2kRNE3zp3KnHsCyEp/LIvTI6sf5ffJygy+Q24ypaMFMyCbBzrPiftSL0o fBl62oN6gc02mHdOLC5/jMLhBULM4W56Z9MoYs9ABh9ziJchioKGJA31/ nQIVad4DBGul6SQ/D7puvKy8/JCKc/FCr5It+uFoMVm9NABJ8ycKG83Da 6K8cLzZokJCg0m9YF3mev0+hVYTCL2GQ4jtzvuZohEoTVilncwmeFH9W5 g==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=CWeXrjdY Subject: [Intel-wired-lan] [PATCH iwl-next 04/15] ice: init parse graph cam table for parser X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qi.z.zhang@intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Parse DDP section ICE_SID_RXPARSER_CAM or ICE_SID_RXPARSER_PG_SPILL into an array of struct ice_pg_cam_item. Parse DDP section ICE_SID_RXPARSER_NOMATCH_CAM or ICE_SID_RXPARSER_NOMATCH_SPILL into an array of struct ice_pg_nm_cam_item. Signed-off-by: Junfeng Guo --- drivers/net/ethernet/intel/ice/ice_parser.c | 44 +++ drivers/net/ethernet/intel/ice/ice_parser.h | 12 + drivers/net/ethernet/intel/ice/ice_pg_cam.c | 300 ++++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_pg_cam.h | 67 +++++ 4 files changed, 423 insertions(+) create mode 100644 drivers/net/ethernet/intel/ice/ice_pg_cam.c create mode 100644 drivers/net/ethernet/intel/ice/ice_pg_cam.h diff --git a/drivers/net/ethernet/intel/ice/ice_parser.c b/drivers/net/ethernet/intel/ice/ice_parser.c index eb672aca240b..90a8b785e4c2 100644 --- a/drivers/net/ethernet/intel/ice/ice_parser.c +++ b/drivers/net/ethernet/intel/ice/ice_parser.c @@ -7,6 +7,10 @@ #define ICE_SEC_DATA_OFFSET 4 #define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE 48 #define ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE 24 +#define ICE_SID_RXPARSER_CAM_ENTRY_SIZE 16 +#define ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE 17 +#define ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE 12 +#define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE 13 /** * ice_parser_sect_item_get - parse a item from a section @@ -32,6 +36,18 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section, case ICE_SID_RXPARSER_METADATA_INIT: size = ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE; break; + case ICE_SID_RXPARSER_CAM: + size = ICE_SID_RXPARSER_CAM_ENTRY_SIZE; + break; + case ICE_SID_RXPARSER_PG_SPILL: + size = ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE; + break; + case ICE_SID_RXPARSER_NOMATCH_CAM: + size = ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE; + break; + case ICE_SID_RXPARSER_NOMATCH_SPILL: + size = ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE; + break; default: return NULL; } @@ -123,6 +139,30 @@ int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr) goto err; } + p->pg_cam_table = ice_pg_cam_table_get(hw); + if (!p->pg_cam_table) { + status = -EINVAL; + goto err; + } + + p->pg_sp_cam_table = ice_pg_sp_cam_table_get(hw); + if (!p->pg_sp_cam_table) { + status = -EINVAL; + goto err; + } + + p->pg_nm_cam_table = ice_pg_nm_cam_table_get(hw); + if (!p->pg_nm_cam_table) { + status = -EINVAL; + goto err; + } + + p->pg_nm_sp_cam_table = ice_pg_nm_sp_cam_table_get(hw); + if (!p->pg_nm_sp_cam_table) { + status = -EINVAL; + goto err; + } + *psr = p; return 0; err: @@ -138,6 +178,10 @@ void ice_parser_destroy(struct ice_parser *psr) { devm_kfree(ice_hw_to_dev(psr->hw), psr->imem_table); devm_kfree(ice_hw_to_dev(psr->hw), psr->mi_table); + devm_kfree(ice_hw_to_dev(psr->hw), psr->pg_cam_table); + devm_kfree(ice_hw_to_dev(psr->hw), psr->pg_sp_cam_table); + devm_kfree(ice_hw_to_dev(psr->hw), psr->pg_nm_cam_table); + devm_kfree(ice_hw_to_dev(psr->hw), psr->pg_nm_sp_cam_table); devm_kfree(ice_hw_to_dev(psr->hw), psr); } diff --git a/drivers/net/ethernet/intel/ice/ice_parser.h b/drivers/net/ethernet/intel/ice/ice_parser.h index 8fcc10479260..1f699ef12387 100644 --- a/drivers/net/ethernet/intel/ice/ice_parser.h +++ b/drivers/net/ethernet/intel/ice/ice_parser.h @@ -4,6 +4,10 @@ #ifndef _ICE_PARSER_H_ #define _ICE_PARSER_H_ +#include "ice_metainit.h" +#include "ice_imem.h" +#include "ice_pg_cam.h" + struct ice_parser { struct ice_hw *hw; /* pointer to the hardware structure */ @@ -11,6 +15,14 @@ struct ice_parser { struct ice_imem_item *imem_table; /* load data from section ICE_SID_RXPARSER_METADATA_INIT */ struct ice_metainit_item *mi_table; + /* load data from section ICE_SID_RXPARSER_CAM */ + struct ice_pg_cam_item *pg_cam_table; + /* load data from section ICE_SID_RXPARSER_PG_SPILL */ + struct ice_pg_cam_item *pg_sp_cam_table; + /* load data from section ICE_SID_RXPARSER_NOMATCH_CAM */ + struct ice_pg_nm_cam_item *pg_nm_cam_table; + /* load data from section ICE_SID_RXPARSER_NOMATCH_SPILL */ + struct ice_pg_nm_cam_item *pg_nm_sp_cam_table; }; int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr); diff --git a/drivers/net/ethernet/intel/ice/ice_pg_cam.c b/drivers/net/ethernet/intel/ice/ice_pg_cam.c new file mode 100644 index 000000000000..25b837ba684c --- /dev/null +++ b/drivers/net/ethernet/intel/ice/ice_pg_cam.c @@ -0,0 +1,300 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2018-2023 Intel Corporation */ + +#include "ice_common.h" +#include "ice_parser_util.h" + +static void _pg_cam_key_dump(struct ice_hw *hw, struct ice_pg_cam_key *key) +{ + dev_info(ice_hw_to_dev(hw), "key:\n"); + dev_info(ice_hw_to_dev(hw), "\tvalid = %d\n", key->valid); + dev_info(ice_hw_to_dev(hw), "\tnode_id = %d\n", key->node_id); + dev_info(ice_hw_to_dev(hw), "\tflag0 = %d\n", key->flag0); + dev_info(ice_hw_to_dev(hw), "\tflag1 = %d\n", key->flag1); + dev_info(ice_hw_to_dev(hw), "\tflag2 = %d\n", key->flag2); + dev_info(ice_hw_to_dev(hw), "\tflag3 = %d\n", key->flag3); + dev_info(ice_hw_to_dev(hw), "\tboost_idx = %d\n", key->boost_idx); + dev_info(ice_hw_to_dev(hw), "\talu_reg = 0x%04x\n", key->alu_reg); + dev_info(ice_hw_to_dev(hw), "\tnext_proto = 0x%08x\n", + key->next_proto); +} + +static void _pg_nm_cam_key_dump(struct ice_hw *hw, + struct ice_pg_nm_cam_key *key) +{ + dev_info(ice_hw_to_dev(hw), "key:\n"); + dev_info(ice_hw_to_dev(hw), "\tvalid = %d\n", key->valid); + dev_info(ice_hw_to_dev(hw), "\tnode_id = %d\n", key->node_id); + dev_info(ice_hw_to_dev(hw), "\tflag0 = %d\n", key->flag0); + dev_info(ice_hw_to_dev(hw), "\tflag1 = %d\n", key->flag1); + dev_info(ice_hw_to_dev(hw), "\tflag2 = %d\n", key->flag2); + dev_info(ice_hw_to_dev(hw), "\tflag3 = %d\n", key->flag3); + dev_info(ice_hw_to_dev(hw), "\tboost_idx = %d\n", key->boost_idx); + dev_info(ice_hw_to_dev(hw), "\talu_reg = 0x%04x\n", key->alu_reg); +} + +static void _pg_cam_action_dump(struct ice_hw *hw, + struct ice_pg_cam_action *action) +{ + dev_info(ice_hw_to_dev(hw), "action:\n"); + dev_info(ice_hw_to_dev(hw), "\tnext_node = %d\n", action->next_node); + dev_info(ice_hw_to_dev(hw), "\tnext_pc = %d\n", action->next_pc); + dev_info(ice_hw_to_dev(hw), "\tis_pg = %d\n", action->is_pg); + dev_info(ice_hw_to_dev(hw), "\tproto_id = %d\n", action->proto_id); + dev_info(ice_hw_to_dev(hw), "\tis_mg = %d\n", action->is_mg); + dev_info(ice_hw_to_dev(hw), "\tmarker_id = %d\n", action->marker_id); + dev_info(ice_hw_to_dev(hw), "\tis_last_round = %d\n", + action->is_last_round); + dev_info(ice_hw_to_dev(hw), "\tho_polarity = %d\n", + action->ho_polarity); + dev_info(ice_hw_to_dev(hw), "\tho_inc = %d\n", action->ho_inc); +} + +/** + * ice_pg_cam_dump - dump an parse graph cam info + * @hw: pointer to the hardware structure + * @item: parse graph cam to dump + */ +void ice_pg_cam_dump(struct ice_hw *hw, struct ice_pg_cam_item *item) +{ + dev_info(ice_hw_to_dev(hw), "index = %d\n", item->idx); + _pg_cam_key_dump(hw, &item->key); + _pg_cam_action_dump(hw, &item->action); +} + +/** + * ice_pg_nm_cam_dump - dump an parse graph no match cam info + * @hw: pointer to the hardware structure + * @item: parse graph no match cam to dump + */ +void ice_pg_nm_cam_dump(struct ice_hw *hw, struct ice_pg_nm_cam_item *item) +{ + dev_info(ice_hw_to_dev(hw), "index = %d\n", item->idx); + _pg_nm_cam_key_dump(hw, &item->key); + _pg_cam_action_dump(hw, &item->action); +} + +/** The function parses a 55 bits Parse Graph CAM Action with below format: + * BIT 0-11: Next Node ID (action->next_node) + * BIT 12-19: Next PC (action->next_pc) + * BIT 20: Is Protocol Group (action->is_pg) + * BIT 21-23: reserved + * BIT 24-31: Protocol ID (action->proto_id) + * BIT 32: Is Marker Group (action->is_mg) + * BIT 33-40: Marker ID (action->marker_id) + * BIT 41: Is Last Round (action->is_last_round) + * BIT 42: Header Offset Polarity (action->ho_poloarity) + * BIT 43-51: Header Offset Inc (action->ho_inc) + * BIT 52-54: reserved + */ +static void _pg_cam_action_init(struct ice_pg_cam_action *action, u64 data) +{ + action->next_node = (u16)(data & 0x7ff); + action->next_pc = (u8)((data >> 11) & 0xff); + action->is_pg = ((data >> 19) & 0x1) != 0; + action->proto_id = ((data >> 23) & 0xff); + action->is_mg = ((data >> 31) & 0x1) != 0; + action->marker_id = ((data >> 32) & 0xff); + action->is_last_round = ((data >> 40) & 0x1) != 0; + action->ho_polarity = ((data >> 41) & 0x1) != 0; + action->ho_inc = ((data >> 42) & 0x1ff); +} + +/** The function parses a 41 bits Parse Graph NoMatch CAM Key with below format: + * BIT 0: Valid (key->valid) + * BIT 1-11: Node ID (key->node_id) + * BIT 12: Flag 0 (key->flag0) + * BIT 13: Flag 1 (key->flag1) + * BIT 14: Flag 2 (key->flag2) + * BIT 15: Flag 3 (key->flag3) + * BIT 16: Boost Hit (key->boost_idx to 0 if it is 0) + * BIT 17-24: Boost Index (key->boost_idx only if Boost Hit is not 0) + * BIT 25-40: ALU Reg (key->alu_reg) + */ +static void _pg_nm_cam_key_init(struct ice_pg_nm_cam_key *key, u64 data) +{ + key->valid = (data & 0x1) != 0; + key->node_id = (u16)((data >> 1) & 0x7ff); + key->flag0 = ((data >> 12) & 0x1) != 0; + key->flag1 = ((data >> 13) & 0x1) != 0; + key->flag2 = ((data >> 14) & 0x1) != 0; + key->flag3 = ((data >> 15) & 0x1) != 0; + if ((data >> 16) & 0x1) + key->boost_idx = (u8)((data >> 17) & 0xff); + else + key->boost_idx = 0; + key->alu_reg = (u16)((data >> 25) & 0xffff); +} + +/** The function parses a 73 bits Parse Graph CAM Key with below format: + * BIT 0: Valid (key->valid) + * BIT 1-11: Node ID (key->node_id) + * BIT 12: Flag 0 (key->flag0) + * BIT 13: Flag 1 (key->flag1) + * BIT 14: Flag 2 (key->flag2) + * BIT 15: Flag 3 (key->flag3) + * BIT 16: Boost Hit (key->boost_idx to 0 if it is 0) + * BIT 17-24: Boost Index (key->boost_idx only if Boost Hit is not 0) + * BIT 25-40: ALU Reg (key->alu_reg) + * BIT 41-72: Next Proto Key (key->next_proto) + */ +static void _pg_cam_key_init(struct ice_pg_cam_key *key, u8 *data) +{ + u64 d64 = *(u64 *)data; + + key->valid = (d64 & 0x1) != 0; + key->node_id = (u16)((d64 >> 1) & 0x7ff); + key->flag0 = ((d64 >> 12) & 0x1) != 0; + key->flag1 = ((d64 >> 13) & 0x1) != 0; + key->flag2 = ((d64 >> 14) & 0x1) != 0; + key->flag3 = ((d64 >> 15) & 0x1) != 0; + if ((d64 >> 16) & 0x1) + key->boost_idx = (u8)((d64 >> 17) & 0xff); + else + key->boost_idx = 0; + key->alu_reg = (u16)((d64 >> 25) & 0xffff); + + key->next_proto = (*(u32 *)&data[5] >> 1); + key->next_proto |= ((u32)(data[9] & 0x1) << 31); +} + +/** The function parses a 128 bits Parse Graph CAM Entry with below format: + * BIT 0-72: Key (ci->key) + * BIT 73-127: Action (ci->action) + */ +static void _pg_cam_parse_item(struct ice_hw *hw, u16 idx, void *item, + void *data, int size) +{ + struct ice_pg_cam_item *ci = item; + u8 *buf = data; + u64 d64; + + ci->idx = idx; + d64 = (*(u64 *)&buf[9] >> 1); + _pg_cam_key_init(&ci->key, buf); + _pg_cam_action_init(&ci->action, d64); + + if (hw->debug_mask & ICE_DBG_PARSER) + ice_pg_cam_dump(hw, ci); +} + +/** The function parses a 136 bits Parse Graph Spill CAM Entry with below + * format: + * BIT 0-55: Action (ci->key) + * BIT 56-135: Key (ci->action) + */ +static void _pg_sp_cam_parse_item(struct ice_hw *hw, u16 idx, void *item, + void *data, int size) +{ + struct ice_pg_cam_item *ci = item; + u8 *buf = data; + u64 d64; + + ci->idx = idx; + d64 = *(u64 *)buf; + _pg_cam_action_init(&ci->action, d64); + _pg_cam_key_init(&ci->key, &buf[7]); + + if (hw->debug_mask & ICE_DBG_PARSER) + ice_pg_cam_dump(hw, ci); +} + +/** The function parses a 96 bits Parse Graph NoMatch CAM Entry with below + * format: + * BIT 0-40: Key (ci->key) + * BIT 41-95: Action (ci->action) + */ +static void _pg_nm_cam_parse_item(struct ice_hw *hw, u16 idx, void *item, + void *data, int size) +{ + struct ice_pg_nm_cam_item *ci = item; + u8 *buf = data; + u64 d64; + + ci->idx = idx; + d64 = *(u64 *)buf; + _pg_nm_cam_key_init(&ci->key, d64); + d64 = (*(u64 *)&buf[5] >> 1); + _pg_cam_action_init(&ci->action, d64); + + if (hw->debug_mask & ICE_DBG_PARSER) + ice_pg_nm_cam_dump(hw, ci); +} + +/** The function parses a 104 bits Parse Graph NoMatch Spill CAM Entry with + * below format: + * BIT 0-55: Key (ci->key) + * BIT 56-103: Action (ci->action) + */ +static void _pg_nm_sp_cam_parse_item(struct ice_hw *hw, u16 idx, void *item, + void *data, int size) +{ + struct ice_pg_nm_cam_item *ci = item; + u8 *buf = data; + u64 d64; + + ci->idx = idx; + d64 = *(u64 *)buf; + _pg_cam_action_init(&ci->action, d64); + d64 = *(u64 *)&buf[7]; + _pg_nm_cam_key_init(&ci->key, d64); + + if (hw->debug_mask & ICE_DBG_PARSER) + ice_pg_nm_cam_dump(hw, ci); +} + +/** + * ice_pg_cam_table_get - create a parse graph cam table + * @hw: pointer to the hardware structure + */ +struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw) +{ + return (struct ice_pg_cam_item *) + ice_parser_create_table(hw, ICE_SID_RXPARSER_CAM, + sizeof(struct ice_pg_cam_item), + ICE_PG_CAM_TABLE_SIZE, + ice_parser_sect_item_get, + _pg_cam_parse_item); +} + +/** + * ice_pg_sp_cam_table_get - create a parse graph spill cam table + * @hw: pointer to the hardware structure + */ +struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw) +{ + return (struct ice_pg_cam_item *) + ice_parser_create_table(hw, ICE_SID_RXPARSER_PG_SPILL, + sizeof(struct ice_pg_cam_item), + ICE_PG_SP_CAM_TABLE_SIZE, + ice_parser_sect_item_get, + _pg_sp_cam_parse_item); +} + +/** + * ice_pg_nm_cam_table_get - create a parse graph no match cam table + * @hw: pointer to the hardware structure + */ +struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw) +{ + return (struct ice_pg_nm_cam_item *) + ice_parser_create_table(hw, ICE_SID_RXPARSER_NOMATCH_CAM, + sizeof(struct ice_pg_nm_cam_item), + ICE_PG_NM_CAM_TABLE_SIZE, + ice_parser_sect_item_get, + _pg_nm_cam_parse_item); +} + +/** + * ice_pg_nm_sp_cam_table_get - create a parse graph no match spill cam table + * @hw: pointer to the hardware structure + */ +struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw) +{ + return (struct ice_pg_nm_cam_item *) + ice_parser_create_table(hw, ICE_SID_RXPARSER_NOMATCH_SPILL, + sizeof(struct ice_pg_nm_cam_item), + ICE_PG_NM_SP_CAM_TABLE_SIZE, + ice_parser_sect_item_get, + _pg_nm_sp_cam_parse_item); +} diff --git a/drivers/net/ethernet/intel/ice/ice_pg_cam.h b/drivers/net/ethernet/intel/ice/ice_pg_cam.h new file mode 100644 index 000000000000..1d794fa519d6 --- /dev/null +++ b/drivers/net/ethernet/intel/ice/ice_pg_cam.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018-2023 Intel Corporation */ + +#ifndef _ICE_PG_CAM_H_ +#define _ICE_PG_CAM_H_ + +#define ICE_PG_CAM_TABLE_SIZE 2048 +#define ICE_PG_SP_CAM_TABLE_SIZE 128 +#define ICE_PG_NM_CAM_TABLE_SIZE 1024 +#define ICE_PG_NM_SP_CAM_TABLE_SIZE 64 + +struct ice_pg_cam_key { + bool valid; + u16 node_id; + bool flag0; + bool flag1; + bool flag2; + bool flag3; + u8 boost_idx; + u16 alu_reg; + u32 next_proto; +}; + +struct ice_pg_nm_cam_key { + bool valid; + u16 node_id; + bool flag0; + bool flag1; + bool flag2; + bool flag3; + u8 boost_idx; + u16 alu_reg; +}; + +struct ice_pg_cam_action { + u16 next_node; + u8 next_pc; + bool is_pg; + u8 proto_id; + bool is_mg; + u8 marker_id; + bool is_last_round; + bool ho_polarity; + u16 ho_inc; +}; + +struct ice_pg_cam_item { + u16 idx; + struct ice_pg_cam_key key; + struct ice_pg_cam_action action; +}; + +struct ice_pg_nm_cam_item { + u16 idx; + struct ice_pg_nm_cam_key key; + struct ice_pg_cam_action action; +}; + +void ice_pg_cam_dump(struct ice_hw *hw, struct ice_pg_cam_item *item); +void ice_pg_nm_cam_dump(struct ice_hw *hw, struct ice_pg_nm_cam_item *item); + +struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw); +struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw); + +struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw); +struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw); +#endif /* _ICE_PG_CAM_H_ */ -- 2.25.1 _______________________________________________ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan