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From: Junfeng Guo <junfeng.guo@intel.com>
To: intel-wired-lan@lists.osuosl.org
Cc: qi.z.zhang@intel.com
Subject: [Intel-wired-lan] [PATCH iwl-next 08/15] ice: init flag redirect table for parser
Date: Mon,  5 Jun 2023 10:29:13 +0800	[thread overview]
Message-ID: <20230605022920.2361266-9-junfeng.guo@intel.com> (raw)
In-Reply-To: <20230605022920.2361266-1-junfeng.guo@intel.com>

Parse DDP section ICE_SID_RXPARSER_FLAG_REDIR into an array of
ice_flag_rd_item.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
---
 drivers/net/ethernet/intel/ice/ice_ddp.h    |  1 +
 drivers/net/ethernet/intel/ice/ice_flg_rd.c | 52 +++++++++++++++++++++
 drivers/net/ethernet/intel/ice/ice_flg_rd.h | 15 ++++++
 drivers/net/ethernet/intel/ice/ice_parser.c | 11 +++++
 drivers/net/ethernet/intel/ice/ice_parser.h |  3 ++
 5 files changed, 82 insertions(+)
 create mode 100644 drivers/net/ethernet/intel/ice/ice_flg_rd.c
 create mode 100644 drivers/net/ethernet/intel/ice/ice_flg_rd.h

diff --git a/drivers/net/ethernet/intel/ice/ice_ddp.h b/drivers/net/ethernet/intel/ice/ice_ddp.h
index da5dfeed3b1f..45beed8b4415 100644
--- a/drivers/net/ethernet/intel/ice/ice_ddp.h
+++ b/drivers/net/ethernet/intel/ice/ice_ddp.h
@@ -261,6 +261,7 @@ struct ice_meta_sect {
 #define ICE_SID_CDID_KEY_BUILDER_PE 87
 #define ICE_SID_CDID_REDIR_PE 88
 
+#define ICE_SID_RXPARSER_FLAG_REDIR	97
 /* Label Metadata section IDs */
 #define ICE_SID_LBL_FIRST 0x80000010
 #define ICE_SID_LBL_RXPARSER_TMEM 0x80000018
diff --git a/drivers/net/ethernet/intel/ice/ice_flg_rd.c b/drivers/net/ethernet/intel/ice/ice_flg_rd.c
new file mode 100644
index 000000000000..827b659e2332
--- /dev/null
+++ b/drivers/net/ethernet/intel/ice/ice_flg_rd.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (C) 2018-2023 Intel Corporation */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_FLG_RD_TABLE_SIZE 64
+
+/**
+ * ice_flg_rd_dump - dump a flag redirect item info
+ * @hw: pointer to the hardware structure
+ * @item: flag redirect item to dump
+ */
+void ice_flg_rd_dump(struct ice_hw *hw, struct ice_flg_rd_item *item)
+{
+	dev_info(ice_hw_to_dev(hw), "index = %d\n", item->idx);
+	dev_info(ice_hw_to_dev(hw), "expose = %d\n", item->expose);
+	dev_info(ice_hw_to_dev(hw), "intr_flg_id = %d\n", item->intr_flg_id);
+}
+
+/** The function parses a 8 bits Flag Redirect Table entry with below format:
+ *  BIT 0:	Expose (rdi->expose)
+ *  BIT 1-6:	Internal Flag ID (rdi->intr_flg_id)
+ *  BIT 7:	reserved
+ */
+static void _flg_rd_parse_item(struct ice_hw *hw, u16 idx, void *item,
+			       void *data, int size)
+{
+	struct ice_flg_rd_item *rdi = item;
+	u8 d8 = *(u8 *)data;
+
+	rdi->idx = idx;
+	rdi->expose = (d8 & 0x1) != 0;
+	rdi->intr_flg_id = (u8)((d8 >> 1) & 0x3f);
+
+	if (hw->debug_mask & ICE_DBG_PARSER)
+		ice_flg_rd_dump(hw, rdi);
+}
+
+/**
+ * ice_flg_rd_table_get - create a flag redirect table
+ * @hw: pointer to the hardware structure
+ */
+struct ice_flg_rd_item *ice_flg_rd_table_get(struct ice_hw *hw)
+{
+	return (struct ice_flg_rd_item *)
+		ice_parser_create_table(hw, ICE_SID_RXPARSER_FLAG_REDIR,
+					sizeof(struct ice_flg_rd_item),
+					ICE_FLG_RD_TABLE_SIZE,
+					ice_parser_sect_item_get,
+					_flg_rd_parse_item, false);
+}
diff --git a/drivers/net/ethernet/intel/ice/ice_flg_rd.h b/drivers/net/ethernet/intel/ice/ice_flg_rd.h
new file mode 100644
index 000000000000..b53e35a46796
--- /dev/null
+++ b/drivers/net/ethernet/intel/ice/ice_flg_rd.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (C) 2018-2023 Intel Corporation */
+
+#ifndef _ICE_FLG_RD_H_
+#define _ICE_FLG_RD_H_
+
+struct ice_flg_rd_item {
+	u16 idx;
+	bool expose;
+	u8 intr_flg_id;
+};
+
+void ice_flg_rd_dump(struct ice_hw *hw, struct ice_flg_rd_item *item);
+struct ice_flg_rd_item *ice_flg_rd_table_get(struct ice_hw *hw);
+#endif /* _ICE_FLG_RD_H_ */
diff --git a/drivers/net/ethernet/intel/ice/ice_parser.c b/drivers/net/ethernet/intel/ice/ice_parser.c
index 345a99770941..fb0bc5c8e6ec 100644
--- a/drivers/net/ethernet/intel/ice/ice_parser.c
+++ b/drivers/net/ethernet/intel/ice/ice_parser.c
@@ -15,6 +15,7 @@
 #define ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE		24
 #define ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE		8
 #define ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE		24
+#define ICE_SID_RXPARSER_FLAG_REDIR_ENTRY_SIZE		1
 
 #define ICE_SEC_LBL_DATA_OFFSET				2
 #define ICE_SID_LBL_ENTRY_SIZE				66
@@ -83,6 +84,9 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
 	case ICE_SID_RXPARSER_PROTO_GRP:
 		size = ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE;
 		break;
+	case ICE_SID_RXPARSER_FLAG_REDIR:
+		size = ICE_SID_RXPARSER_FLAG_REDIR_ENTRY_SIZE;
+		break;
 	default:
 		return NULL;
 	}
@@ -234,6 +238,12 @@ int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
 		goto err;
 	}
 
+	p->flg_rd_table = ice_flg_rd_table_get(hw);
+	if (!p->flg_rd_table) {
+		status = -EINVAL;
+		goto err;
+	}
+
 	*psr = p;
 	return 0;
 err:
@@ -258,6 +268,7 @@ void ice_parser_destroy(struct ice_parser *psr)
 	devm_kfree(ice_hw_to_dev(psr->hw), psr->ptype_mk_tcam_table);
 	devm_kfree(ice_hw_to_dev(psr->hw), psr->mk_grp_table);
 	devm_kfree(ice_hw_to_dev(psr->hw), psr->proto_grp_table);
+	devm_kfree(ice_hw_to_dev(psr->hw), psr->flg_rd_table);
 
 	devm_kfree(ice_hw_to_dev(psr->hw), psr);
 }
diff --git a/drivers/net/ethernet/intel/ice/ice_parser.h b/drivers/net/ethernet/intel/ice/ice_parser.h
index 3f17b15a1381..5eed54d9d189 100644
--- a/drivers/net/ethernet/intel/ice/ice_parser.h
+++ b/drivers/net/ethernet/intel/ice/ice_parser.h
@@ -11,6 +11,7 @@
 #include "ice_ptype_mk.h"
 #include "ice_mk_grp.h"
 #include "ice_proto_grp.h"
+#include "ice_flg_rd.h"
 
 struct ice_parser {
 	struct ice_hw *hw; /* pointer to the hardware structure */
@@ -37,6 +38,8 @@ struct ice_parser {
 	struct ice_mk_grp_item *mk_grp_table;
 	/* load data from section ICE_SID_RXPARSER_PROTO_GRP */
 	struct ice_proto_grp_item *proto_grp_table;
+	/* load data from section ICE_SID_RXPARSER_FLAG_REDIR */
+	struct ice_flg_rd_item *flg_rd_table;
 };
 
 int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
-- 
2.25.1

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  parent reply	other threads:[~2023-06-05  2:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-05  2:29 [Intel-wired-lan] [PATCH iwl-next 00/15] Introduce the Parser Library Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 01/15] ice: add parser create and destroy skeleton Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 02/15] ice: init imem table for parser Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 03/15] ice: init metainit " Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 04/15] ice: init parse graph cam " Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 05/15] ice: init boost tcam " Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 06/15] ice: init ptype marker " Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 07/15] ice: init marker and protocol group " Junfeng Guo
2023-06-05  2:29 ` Junfeng Guo [this message]
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 09/15] ice: init XLT key builder " Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 10/15] ice: add parser runtime skeleton Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 11/15] ice: add internal help functions Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 12/15] ice: add parser execution main loop Junfeng Guo
2023-06-05  4:47   ` kernel test robot
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 13/15] ice: support double vlan mode configure for parser Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 14/15] ice: add tunnel port support " Junfeng Guo
2023-06-05  2:29 ` [Intel-wired-lan] [PATCH iwl-next 15/15] ice: add API for parser profile initialization Junfeng Guo

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