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d="scan'208";a="3953424" Received: from unknown (HELO vcostago-mobl3.lan) ([10.125.18.63]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2024 17:05:21 -0800 From: Vinicius Costa Gomes To: intel-wired-lan@lists.osuosl.org Date: Fri, 16 Feb 2024 17:04:52 -0800 Message-ID: <20240217010455.58258-1-vinicius.gomes@intel.com> X-Mailer: git-send-email 2.43.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708131928; x=1739667928; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=FQ9K7TIndVZzBY+pC4w0lO3OzwDekfu9F+7olBxUOr0=; b=J6ELvzWf2OH594QqrLJwy4NQCmHkv+whM6uhiO8z84RGFRTLKu4qLGMu YKCs84UbH1VRt3I8Z8ActaHv2dKdqWJ42a9i2IQWXes6g6oR+Ur06SUai gIvbtfHVgcbgEIRruO9yE4FYRbzXXJF8JLLcpkdDB9Y8VdpFy0komVrn/ Lg1YcV8zx2UBPBr+8CIhtyg2aqmNhJV0W88CSgynwP8ZHtEjzLst1088N 0dveQoqm3DG1mKjfTdm6hwurklMU/SGk3JnAAZisK+UDCwral7Z+S5Sme XDTIJfYCL7DzQzaKaTJjjyQu3Y/75hVjz8mQ2X0FfdrrDQAqvQYX28BqA Q==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=J6ELvzWf Subject: [Intel-wired-lan] [iwl-net v1 0/2] igc/igb: Fix missing time sync events X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sasha.neftin@intel.com, Vinicius Costa Gomes , richardcochran@gmail.com, kurt@linutronix.de, jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Hi, It was reported that i225/i226 could sometimes miss some time sync events when two or more types of events (PPS and Timestamps was used by the reporter) are being used at the same time under heavy traffic. The core issue is that the driver was double clearing interrupts, as the register is both "read to clear" and "write 1 to clear" (documented in section 8.16.1 of the datasheet), and the handler was doing both. Which could cause events to be missed if they happen between the "read" and the "write". Removing the write fixes the issue. It was tracked down to commit 2c344ae24501 ("igc: Add support for TX timestamping"), in which I added support for basic timestamp operations, the issue is that as the hardware operates very similarly to i210, I used igb code as inspiration. And indeed, the same double clearing is present there. But in the igb case, I haven't seen myself or heard about any issues that seem related to this. So I think it's more like a possible issue. But it seems like a good idea to fix it there was well. Vinicius Costa Gomes (2): igc: Fix missing time sync events igb: Fix missing time sync events drivers/net/ethernet/intel/igb/igb_main.c | 23 +++++------------------ drivers/net/ethernet/intel/igc/igc_main.c | 12 +----------- 2 files changed, 6 insertions(+), 29 deletions(-) -- 2.43.2