From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp4.osuosl.org (smtp4.osuosl.org [140.211.166.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1190BE77180 for ; Mon, 16 Dec 2024 08:56:35 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp4.osuosl.org (Postfix) with ESMTP id 5068040B27; Mon, 16 Dec 2024 08:56:35 +0000 (UTC) X-Virus-Scanned: amavis at osuosl.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP id enbBAA7w8b63; Mon, 16 Dec 2024 08:56:33 +0000 (UTC) X-Comment: SPF check N/A for local connections - client-ip=140.211.166.142; helo=lists1.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver= DKIM-Filter: OpenDKIM Filter v2.11.0 smtp4.osuosl.org EBA5E409F2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=osuosl.org; s=default; t=1734339393; bh=GbOI1pWskaCwpyldwxHrAnEG8CLoW2Q1PUGj/TrGuvY=; h=From:To:Cc:Date:In-Reply-To:References:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=9ybPJj2TZFyI+kqO9cJmu1XD+nr4dS/kpS5qwiInoSQrIsJqal13PuztUMzXQF4U2 VL5l4fRU5TMUs0Fx/4czv/zjpMvxGEVOyZYW6pU7hc91NNZ5xhmLPEsYIgHEZsY6KX gO8t9YvU3ppDG7OLTRp/I+vFQrxMJp0C4Nn33eZBeBsTRsxr/fvpLCarAf/FZ7HZ80 LKPwFGcQtld9JW/pvRmombGnWklIf21ymjTvObUQFYiiAtHM+5fs14em8BwEhiWhjG jtW2oFNDrMQf8I0VV85yzW/9BUucXtDtv8Bi2ba9sYaN+jD2hAcnY14qYcLaBJSGFR 1ABhHVUz0vDDA== Received: from lists1.osuosl.org (lists1.osuosl.org [140.211.166.142]) by smtp4.osuosl.org (Postfix) with ESMTP id EBA5E409F2; Mon, 16 Dec 2024 08:56:32 +0000 (UTC) Received: from smtp1.osuosl.org (smtp1.osuosl.org [IPv6:2605:bc80:3010::138]) by lists1.osuosl.org (Postfix) with ESMTP id 3E813CE for ; Mon, 16 Dec 2024 08:56:31 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp1.osuosl.org (Postfix) with ESMTP id 203258149B for ; Mon, 16 Dec 2024 08:56:31 +0000 (UTC) X-Virus-Scanned: amavis at osuosl.org Received: from smtp1.osuosl.org ([127.0.0.1]) by localhost (smtp1.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP id fcOOjuUDUI5J for ; Mon, 16 Dec 2024 08:56:30 +0000 (UTC) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=192.198.163.14; helo=mgamail.intel.com; envelope-from=anton.nadezhdin@intel.com; receiver= DMARC-Filter: OpenDMARC Filter v1.4.2 smtp1.osuosl.org 5B0098149C DKIM-Filter: OpenDKIM Filter v2.11.0 smtp1.osuosl.org 5B0098149C Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) by smtp1.osuosl.org (Postfix) with ESMTPS id 5B0098149C for ; Mon, 16 Dec 2024 08:56:30 +0000 (UTC) X-CSE-ConnectionGUID: vvAsn+8/TBSWOl7W9t5DBw== X-CSE-MsgGUID: FpBtS4ASRR+h9VVpyuMNUQ== X-IronPort-AV: E=McAfee;i="6700,10204,11287"; a="34942398" X-IronPort-AV: E=Sophos;i="6.12,238,1728975600"; d="scan'208";a="34942398" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2024 00:56:30 -0800 X-CSE-ConnectionGUID: TZ2w4sfWSAGAHxcNAtLQSg== X-CSE-MsgGUID: nsO9VPF3QROWXBkZRoxgIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="102117157" Received: from host61.igk.intel.com ([10.123.220.61]) by orviesa005.jf.intel.com with ESMTP; 16 Dec 2024 00:56:26 -0800 From: Anton Nadezhdin To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com, richardcochran@gmail.com, Jacob Keller , Karol Kolacinski , Milena Olech , Anton Nadezhdin Date: Mon, 16 Dec 2024 09:53:28 -0500 Message-ID: <20241216145453.333745-2-anton.nadezhdin@intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20241216145453.333745-1-anton.nadezhdin@intel.com> References: <20241216145453.333745-1-anton.nadezhdin@intel.com> MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Content-Transfer-Encoding: 8bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734339390; x=1765875390; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tTrUHU/UfhsiPCt/C0iCANolN5harHvI6rQ+JdSrwn4=; b=dK5kicLtugZQAaRBcRf4+8ZIRuY9Rj5w0Xg5Lp+viHW9EVty3col8rSb f+i5zGfADK1Gy1NRa80jmyyDJHWq1lTgNmwEfoAOLc7yIBD7Rlq1FyjDK WF8fMenMt/d44kWlLgzdIN+Si4sqsJSQVpuqL1kAd4L9svVXGxm/VXluy b85QkNv20YPPRpzWwHgML4nkOADA6W0RIZd+/yySLBpwrkD5z/z6p+oxl 0TuT+NnBR7lU1llsOiNJSbzZF3v3PIP12L774A5kOWqkNrWoHunNqQ5wq 1fSe6BWUXIwiZxU4iOvflrPyteJipJjxx/5+YSjO4HjM1lF5v9hzFqiNN A==; X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=dK5kicLt Subject: [Intel-wired-lan] [PATCH iwl-next v2 1/5] ice: use rd32_poll_timeout_atomic in ice_read_phy_tstamp_ll_e810 X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Jacob Keller The ice_read_phy_tstamp_ll_e810 function repeatedly reads the PF_SB_ATQBAL register until the TS_LL_READ_TS bit is cleared. This is a perfect candidate for using rd32_poll_timeout. However, the default implementation uses a sleep-based wait. Add a new rd32_poll_timeout_atomic macro which is based on the non-sleeping read_poll_timeout_atomic implementation. Use this to replace the loop reading in the ice_read_phy_tstamp_ll_e810 function. This will also be used in the future when low latency PHY timer updates are supported. Co-developed-by: Karol Kolacinski Signed-off-by: Karol Kolacinski Signed-off-by: Jacob Keller Reviewed-by: Milena Olech Signed-off-by: Anton Nadezhdin --- drivers/net/ethernet/intel/ice/ice_osdep.h | 3 +++ drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 30 +++++++++------------ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 +- 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_osdep.h b/drivers/net/ethernet/intel/ice/ice_osdep.h index b9f383494b3f..9bb343de80a9 100644 --- a/drivers/net/ethernet/intel/ice/ice_osdep.h +++ b/drivers/net/ethernet/intel/ice/ice_osdep.h @@ -26,6 +26,9 @@ #define rd32_poll_timeout(a, addr, val, cond, delay_us, timeout_us) \ read_poll_timeout(rd32, val, cond, delay_us, timeout_us, false, a, addr) +#define rd32_poll_timeout_atomic(a, addr, val, cond, delay_us, timeout_us) \ + read_poll_timeout_atomic(rd32, val, cond, delay_us, timeout_us, false, \ + a, addr) #define ice_flush(a) rd32((a), GLGEN_STAT) #define ICE_M(m, s) ((m ## U) << (s)) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index e017e72cee5b..4a0d5d9ad605 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -4883,32 +4883,28 @@ static int ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo) { u32 val; - u8 i; + int err; /* Write TS index to read to the PF register so the FW can read it */ val = FIELD_PREP(TS_LL_READ_TS_IDX, idx) | TS_LL_READ_TS; wr32(hw, PF_SB_ATQBAL, val); /* Read the register repeatedly until the FW provides us the TS */ - for (i = TS_LL_READ_RETRIES; i > 0; i--) { - val = rd32(hw, PF_SB_ATQBAL); - - /* When the bit is cleared, the TS is ready in the register */ - if (!(FIELD_GET(TS_LL_READ_TS, val))) { - /* High 8 bit value of the TS is on the bits 16:23 */ - *hi = FIELD_GET(TS_LL_READ_TS_HIGH, val); + err = rd32_poll_timeout_atomic(hw, PF_SB_ATQBAL, val, + !FIELD_GET(TS_LL_READ_TS, val), + 10, TS_LL_READ_TIMEOUT); + if (err) { + ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n"); + return err; + } - /* Read the low 32 bit value and set the TS valid bit */ - *lo = rd32(hw, PF_SB_ATQBAH) | TS_VALID; - return 0; - } + /* High 8 bit value of the TS is on the bits 16:23 */ + *hi = FIELD_GET(TS_LL_READ_TS_HIGH, val); - udelay(10); - } + /* Read the low 32 bit value and set the TS valid bit */ + *lo = rd32(hw, PF_SB_ATQBAH) | TS_VALID; - /* FW failed to provide the TS in time */ - ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n"); - return -EINVAL; + return 0; } /** diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index 3227bd78d291..937f530c842e 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -674,7 +674,7 @@ static inline bool ice_is_dual(struct ice_hw *hw) #define BYTES_PER_IDX_ADDR_L 4 /* Tx timestamp low latency read definitions */ -#define TS_LL_READ_RETRIES 200 +#define TS_LL_READ_TIMEOUT 2000 #define TS_LL_READ_TS_HIGH GENMASK(23, 16) #define TS_LL_READ_TS_IDX GENMASK(29, 24) #define TS_LL_READ_TS_INTR BIT(30) -- 2.42.0