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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Faizal Rahim , Aleksandr Loktionov , Chwee-Lin Choong Date: Wed, 14 May 2025 00:29:37 -0400 Message-Id: <20250514042945.2685273-1-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1747197065; x=1778733065; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=jescl6f+uybA68SsSMxRC4QbDzkbPdEF/STWwsg9JYM=; b=ghEE/WRVjRWaxelmPI70HuUfydBExBilLjVIT938Cszwb0SuVkZNZGGk pGOXPNfYbwhR48/s1PwYcCA10UrNA+nbgrjnTU/rWPWTbmmaT7ersHf0K tHCU1R6T22m2oBlUj4zJdK+98cBYhH7mWUxZ3ae+cflEuHS8vWdIfYjr4 yUtSQwa4J4ndGEw87zunNJcAaCf4hz7v94KjH5ZlDVCq2/bHb854oQU/j lD1T4kcTf3QJH57eLVe8lcnLNRW3Y7MTiVyNh8oODrGNZlLiSCArSR6BD obLaM4DnLGgjQtIMzQgaqMcnjBXfKltDPlG7QzoaqdHOgy1RmXYwif12+ w==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dmarc=none (p=none dis=none) header.from=linux.intel.com X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ghEE/WRV Subject: [Intel-wired-lan] [PATCH iwl-next v2 0/8] igc: harmonize queue priority and add preemptible queue support X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" MAC Merge support for frame preemption was previously added for igc: https://patchwork.kernel.org/project/netdevbpf/patch/20250318030742.2567080-1-faizal.abdul.rahim@linux.intel.com/ This series builds on that work and adds support for: - Harmonizing taprio and mqprio queue priority behavior, based on past discussions and suggestions: https://lore.kernel.org/all/20250214102206.25dqgut5tbak2rkz@skbuf/ - Enabling preemptible queue support for both taprio and mqprio, with priority harmonization as a prerequisite. Patch organization: - Patches 1–3: Preparation work for patches 6 and 7 - Patches 4–5: Queue priority harmonization - Patches 6–8: Add preemptible queue support v2 changes: - v1: https://patchwork.kernel.org/project/netdevbpf/cover/20250428060225.1306986-1-faizal.abdul.rahim@linux.intel.com/ - Move RXDCTL macros for consistency with TXDCTL (Ruinskiy, Dima) - Rename RX descriptor control macros with RXDCTL prefix (Ruinskiy, Dima) - Add FPE acronym explanation in commit description (Loktionov, Aleksandr) - Add Reviewed-by tag from Aleksandr for patch 6 Chwee-Lin Choong (1): igc: SW pad preemptible frames for correct mCRC calculation Faizal Rahim (7): igc: move TXDCTL and RXDCTL related macros igc: add DCTL prefix to related macros igc: refactor TXDCTL macros to use FIELD_PREP and GEN_MASK igc: assign highest TX queue number as highest priority in mqprio igc: add private flag to reverse TX queue priority in TSN mode igc: add preemptible queue support in taprio igc: add preemptible queue support in mqprio drivers/net/ethernet/intel/igc/igc.h | 33 +++++- drivers/net/ethernet/intel/igc/igc_base.h | 8 -- drivers/net/ethernet/intel/igc/igc_defines.h | 1 + drivers/net/ethernet/intel/igc/igc_ethtool.c | 12 +- drivers/net/ethernet/intel/igc/igc_main.c | 56 ++++++--- drivers/net/ethernet/intel/igc/igc_tsn.c | 116 ++++++++++++++++--- drivers/net/ethernet/intel/igc/igc_tsn.h | 5 + 7 files changed, 188 insertions(+), 43 deletions(-) -- 2.34.1