From: Jacob Keller <jacob.e.keller@intel.com>
To: Intel Wired LAN <intel-wired-lan@lists.osuosl.org>
Cc: Jacob Keller <jacob.e.keller@intel.com>,
Anthony Nguyen <anthony.l.nguyen@intel.com>,
netdev@vger.kernel.org,
Karol Kolacinski <karol.kolacinski@intel.com>,
Milena Olech <milena.olech@intel.com>
Subject: [Intel-wired-lan] [PATCH 5/8] ice: wait before enabling TSPLL
Date: Mon, 23 Jun 2025 17:30:01 -0700 [thread overview]
Message-ID: <20250623-kk-tspll-improvements-alignment-v1-5-fe9a50620700@intel.com> (raw)
In-Reply-To: <20250623-kk-tspll-improvements-alignment-v1-0-fe9a50620700@intel.com>
From: Karol Kolacinski <karol.kolacinski@intel.com>
To ensure proper operation, wait for 10 to 20 microseconds before
enabling TSPLL.
Adjust wait time after enabling TSPLL from 1-5 ms to 1-2 ms.
Those values are empirical and tested on multiple HW configurations.
Reviewed-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
---
drivers/net/ethernet/intel/ice/ice_tspll.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c
index e7b44e703d7c0966414e119f861ee1ab165d9293..abd9f4ff2f5563e35dd8e8fa551eb944d8f5802a 100644
--- a/drivers/net/ethernet/intel/ice/ice_tspll.c
+++ b/drivers/net/ethernet/intel/ice/ice_tspll.c
@@ -261,6 +261,9 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
if (err)
return err;
+ /* Wait to ensure everything is stable */
+ usleep_range(10, 20);
+
/* Finally, enable the PLL */
r24 |= ICE_CGU_R23_R24_TSPLL_ENABLE;
@@ -268,8 +271,8 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
if (err)
return err;
- /* Wait to verify if the PLL locks */
- usleep_range(1000, 5000);
+ /* Wait at least 1 ms to verify if the PLL locks */
+ usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);
err = ice_read_cgu_reg(hw, ICE_CGU_RO_BWM_LF, &val);
if (err)
@@ -445,6 +448,9 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
if (err)
return err;
+ /* Wait to ensure everything is stable */
+ usleep_range(10, 20);
+
/* Finally, enable the PLL */
r23 |= ICE_CGU_R23_R24_TSPLL_ENABLE;
@@ -452,8 +458,8 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
if (err)
return err;
- /* Wait to verify if the PLL locks */
- usleep_range(1000, 5000);
+ /* Wait at least 1 ms to verify if the PLL locks */
+ usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);
err = ice_read_cgu_reg(hw, ICE_CGU_RO_LOCK, &val);
if (err)
--
2.48.1.397.gec9d649cc640
next prev parent reply other threads:[~2025-06-24 0:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 0:29 [Intel-wired-lan] [PATCH 0/8] ice: Separate TSPLL from PTP and cleanup Jacob Keller
2025-06-24 0:29 ` [Intel-wired-lan] [PATCH 1/8] ice: clear time_sync_en field for E825-C during reprogramming Jacob Keller
2025-06-24 0:29 ` [Intel-wired-lan] [PATCH 2/8] ice: read TSPLL registers again before reporting status Jacob Keller
2025-06-24 0:29 ` [Intel-wired-lan] [PATCH 3/8] ice: use bitfields instead of unions for CGU regs Jacob Keller
2025-06-24 0:30 ` [Intel-wired-lan] [PATCH 4/8] ice: add multiple TSPLL helpers Jacob Keller
2025-06-24 0:30 ` Jacob Keller [this message]
2025-06-24 0:30 ` [Intel-wired-lan] [PATCH 6/8] ice: fall back to TCXO on TSPLL lock fail Jacob Keller
2025-06-24 0:30 ` [Intel-wired-lan] [PATCH 7/8] ice: move TSPLL init calls to ice_ptp.c Jacob Keller
2025-06-24 0:30 ` [Intel-wired-lan] [PATCH 8/8] ice: default to TIME_REF instead of TXCO on E825-C Jacob Keller
2025-06-24 16:57 ` [Intel-wired-lan] [PATCH 0/8] ice: Separate TSPLL from PTP and cleanup Jacob Keller
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