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Thu, 08 Jan 2026 13:23:39 -0500 X-MC-Unique: T6LDz9oSMBejyACxrDvskg-1 X-Mimecast-MFC-AGG-ID: T6LDz9oSMBejyACxrDvskg_1767896616 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 5512C1956089; Thu, 8 Jan 2026 18:23:36 +0000 (UTC) Received: from p16v.luc.cera.cz (unknown [10.44.32.20]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 0B0E8180009E; Thu, 8 Jan 2026 18:23:28 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Date: Thu, 8 Jan 2026 19:23:07 +0100 Message-ID: <20260108182318.20935-2-ivecera@redhat.com> In-Reply-To: <20260108182318.20935-1-ivecera@redhat.com> References: <20260108182318.20935-1-ivecera@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1767896622; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=l7UAWP2gVCuNI0Vx3D2ZNEyFfK9TlSzN+mM7vkRFKbM=; b=bnr2GJ8Yy+0+5dmnvPW1xcOKr3IG2I6k5GQT1xjtySNJcUWzT0e4LzSRg8fsYvyCgxzQWm wCVnjRq/jJmVdlouyHCMkLhVFqGpVIqM+jBeOe1WyFBqYGywaSAsSkzsCK5Ntj2TQYd4q8 gEuiS7UQwSSOxd7vztBxNIsG1S634Wc= X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dkim=pass (1024-bit key, unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=bnr2GJ8Y Subject: [Intel-wired-lan] [PATCH net-next 01/12] dt-bindings: dpll: add common dpll-pin-consumer schema X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eric Dumazet , Tony Nguyen , Rob Herring , Leon Romanovsky , Andrew Lunn , linux-rdma@vger.kernel.org, Przemek Kitszel , Arkadiusz Kubalewski , intel-wired-lan@lists.osuosl.org, Jakub Kicinski , Paolo Abeni , devicetree@vger.kernel.org, Conor Dooley , Jiri Pirko , Richard Cochran , Prathosh Satish , Vadim Fedorenko , Mark Bloch , linux-kernel@vger.kernel.org, Tariq Toukan , Alexander Lobakin , Jonathan Lemon , Krzysztof Kozlowski , Saeed Mahameed , "David S. Miller" Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Introduce a common schema for DPLL pin consumers. Devices such as Ethernet controllers and PHYs may require connections to DPLL pins for Synchronous Ethernet (SyncE) or other frequency synchronization tasks. Defining these properties in a shared schema ensures consistency across different device types that consume DPLL resources. Signed-off-by: Ivan Vecera --- .../bindings/dpll/dpll-pin-consumer.yaml | 30 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml diff --git a/Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml b/Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml new file mode 100644 index 0000000000000..60c184c18318a --- /dev/null +++ b/Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dpll/dpll-pin-consumer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DPLL Pin Consumer + +maintainers: + - Ivan Vecera + +description: | + Common properties for devices that require connection to DPLL (Digital Phase + Locked Loop) pins for frequency synchronization (e.g. SyncE). + +properties: + dpll-pins: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + List of phandles to the DPLL pin nodes connected to this device. + + dpll-pin-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Names for the DPLL pins defined in 'dpll-pins', in the same order. + +dependencies: + dpll-pin-names: [ dpll-pins ] + +additionalProperties: true diff --git a/MAINTAINERS b/MAINTAINERS index 765ad2daa2183..f6f58dfb20931 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7648,6 +7648,7 @@ M: Jiri Pirko L: netdev@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/dpll/dpll-device.yaml +F: Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml F: Documentation/devicetree/bindings/dpll/dpll-pin.yaml F: Documentation/driver-api/dpll.rst F: drivers/dpll/ -- 2.52.0