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Thu, 22 Jan 2026 22:51:11 -0800 (PST) Received: from gmail.com ([2a09:bac5:1f0c:28::4:33f]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d91c52bsm3071176c88.6.2026.01.22.22.51.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jan 2026 22:51:10 -0800 (PST) From: Qingfang Deng To: "Loktionov, Aleksandr" Cc: intel-wired-lan@lists.osuosl.org, "Nguyen, Anthony L" , netdev@vger.kernel.org, "Jagielski, Jedrzej" , Chuanhong Guo Date: Fri, 23 Jan 2026 14:45:22 +0800 Message-ID: <20260123065052.237216-1-dqfext@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: <20260122085102.1117651-1-aleksandr.loktionov@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1769151071; x=1769755871; darn=lists.osuosl.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Bh9xMPBAfEqI5JKP5L7PsbeTrLZpUAW4aLq8P7MxDI0=; b=asFoKHOKK9tIg95FiP3NwifmO2F4ZDqW18tJnWDvFpEJpcrnC1eH+iaXSwd99FcnbC cjs+ZWuhr9wljLl1knvRxmbMHsuW2dzYJI89KDvQBm/jhHngcOdiqI8czKTsdLXdl7OD j9wCPSxIl56baAKPBq1nq02HqFMemXpCv8I280DcUHyIsdK+B19V2CXT+si0DsP2+rOA iXJIrqncfoh+xz64CjZbQZ1Es8JEdjwTJ61zO8wDU/fa5Ey9/4Rh9eAWHakX/GHEKJfZ Jt2rZsp/Bb2FgC4SJthWs5K3eolwBoxzFl0fAxX8cp5mW90cb54N86mIYD1D+N6hY57e KoHg== X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dmarc=pass (p=none dis=none) header.from=gmail.com X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=asFoKHOK Subject: Re: [Intel-wired-lan] [PATCH iwl-next v1] ixgbe: fix type punning in ixgbe_update_flash_X550 X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" On Thu, 22 Jan 2026 10:12:54 +0000, Aleksandr Loktionov wrote: > Thanks for the review, and agreed on the root cause. > My motivation here was the mismatch between how the buffer is defined and > how it’s consumed: the current cast-to-u32 * pattern felt brittle. > Making the HIC buffer naturally 4-byte aligned is simpler and clearer for > both readers and the compiler. Separately, while x86 will typically > tolerate this, other architectures require natural alignment and may trap > or penalize unaligned 32-bit accesses. So even if a crash hasn’t been > reported, relying on 1-byte alignment for something treated as u32[] is > not great practice across all supported arches. This change makes the > layout explicitly safe. I’ll resend with a corrected commit message that > focuses on alignment (not strict aliasing, given the kernel is built with -fno-strict-aliasing). > > ixgbe: fix unaligned u32 access in ixgbe_update_flash_X550() > > ixgbe_host_interface_command() treats its buffer as a u32 array. The local > buffer we pass in was a union of byte-sized fields, which gives it 1-byte > alignment on the stack. On strict-align architectures this can cause > unaligned 32-bit accesses. > > Add a u32 member to union ixgbe_hic_hdr2 so the object is 4-byte aligned, and > pass the u32 member when calling ixgbe_host_interface_command(). > > No functional change on x86; prevents unaligned accesses on architectures > that enforce natural alignment. > > Fixes: 49425dfc7451 ("ixgbe: Add support for x550em_a 10G MAC type") > Signed-off-by: Aleksandr Loktionov > > What do you think? > > Thanks! LGTM, but do wait 24h after v1 before posting v2. Regards, Qingfang