Re: [Intel-wired-lan] [PATCH 5/5] PCI/PTM: Do not enable PTM automatically for Root and Switch Upstream Ports

Dahan, AvigailX
2026-03-09T10:54:48Z

On 24/02/2026 13:10, Mika Westerberg wrote:
> Currently we enable PTM automatically for Root and Switch Upstream Ports
> if the advertised capabilities support the relevant role. However, there
> are few issues with this. First of all if there is no Endpoint that
> actually needs the PTM functionality, this is just wasting link
> bandwidth. There are just a couple of drivers calling pci_ptm_enable()
> in the tree.
>
> Secondly we do the enablement in pci_ptm_init() that is called pretty
> early for the Switch Upstream Port before Downstream Ports are even
> enumerated. Since the Upstream Port configuration affects the whole
> Switch enabling it this early might cause the PTM requests to be sent
> already. We actually do see effect of this:
>
> pcieport 0000:00:07.1: pciehp: Slot(6-1): Card present
> pcieport 0000:00:07.1: pciehp: Slot(6-1): Link Up
> pci 0000:2c:00.0: [8086:5786] type 01 class 0x060400 PCIe Switch Upstream Port
> pci 0000:2c:00.0: PCI bridge to [bus 00]
> pci 0000:2c:00.0: bridge window [io 0x0000-0x0fff]
> pci 0000:2c:00.0: bridge window [mem 0x00000000-0x000fffff]
> pci 0000:2c:00.0: bridge window [mem 0x00000000-0x000fffff 64bit pref]
> ...
> pci 0000:2c:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> pci 0000:2c:00.0: PTM enabled, 4ns granularity
>
> At this point we have only enumerated the Switch Upstream Port and now
> PTM got enabled which immediately triggers flood of these:
>
> pcieport 0000:00:07.1: AER: Multiple Uncorrectable (Non-Fatal) error message received from 0000:00:07.1
> pcieport 0000:00:07.1: PCIe Bus Error: severity=Uncorrectable (Non-Fatal), type=Transaction Layer, (Receiver ID)
> pcieport 0000:00:07.1: device [8086:d44f] error status/mask=00200000/00000000
> pcieport 0000:00:07.1: [21] ACSViol (First)
> pcieport 0000:00:07.1: AER: TLP Header: 0x34000000 0x00000052 0x00000000 0x00000000
> pcieport 0000:00:07.1: AER: device recovery successful
> pcieport 0000:00:07.1: AER: Uncorrectable (Non-Fatal) error message received from 0000:00:07.1
>
> In the above TLP Header the Requester ID is 0 which rightfully triggers
> an error as we have ACS Source Validation enabled.
>
> For this reason change the PTM enablement to happen at the time
> pci_enable_ptm() is called. It will try to enable PTM first for upstream
> devices before enabling for the Endpoint itself. For disable path we
> need to keep count of how many times PTM has been enabled and disable
> only on the last so change the dev->ptm_enabled to a counter (and rename
> it to dev->ptm_enable_cnt analogous to dev->pci_enable_cnt).
>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> ---
> drivers/pci/pcie/ptm.c | 68 ++++++++++++++++++++++++------------------
> include/linux/pci.h | 2 +-
> 2 files changed, 40 insertions(+), 30 deletions(-)
>

Tested-by: Avigail Dahan <avigailx.dahan@intel.com>