[Intel-wired-lan] [PATCH iwl-next 10/10] ice: promote Tx FIFO drain timeout message from dev_dbg to dev_warn

Aleksandr Loktionov
2026-04-10T07:49:43Z

The message emitted when the Tx FIFO fails to drain within the
timeout period is currently at dev_dbg level, making it invisible
unless debug logging is enabled. Promote it to dev_warn so that
users and administrators can detect Tx timestamp path issues
without enabling extra logging.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
---
drivers/net/ethernet/intel/ice/ice_ptp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
index 801a6e66..841c999 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
@@ -1108,9 +1108,9 @@ static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port)
port->tx_fifo_busy_cnt, port->port_num);

if (port->tx_fifo_busy_cnt == ICE_PTP_FIFO_NUM_CHECKS) {
- dev_dbg(ice_pf_to_dev(pf),
- "Port %d Tx FIFO still not empty; resetting quad %d\n",
- port->port_num, quad);
+ dev_warn(ice_pf_to_dev(pf),
+ "Port %d Tx FIFO still not empty; resetting quad %d\n",
+ port->port_num, quad);
ice_ptp_reset_ts_memory_quad_e82x(hw, quad);
port->tx_fifo_busy_cnt = FIFO_OK;
return 0;
--
2.52.0