From: Jakub Kicinski <kuba@kernel.org>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: ivecera@redhat.com, vadim.fedorenko@linux.dev, jiri@resnulli.us,
edumazet@google.com,
Aleksandr Loktionov <aleksandr.loktionov@intel.com>,
netdev@vger.kernel.org, richardcochran@gmail.com,
donald.hunter@gmail.com, linux-kernel@vger.kernel.org,
arkadiusz.kubalewski@intel.com, Prathosh.Satish@microchip.com,
andrew+netdev@lunn.ch, intel-wired-lan@lists.osuosl.org,
horms@kernel.org, przemyslaw.kitszel@intel.com,
anthony.l.nguyen@intel.com, pabeni@redhat.com,
davem@davemloft.net, Jiri Pirko <jiri@nvidia.com>
Subject: Re: [Intel-wired-lan] [PATCH v8 net-next 2/8] dpll: allow registering FW-identified pin with a different DPLL
Date: Wed, 13 May 2026 19:14:34 -0700 [thread overview]
Message-ID: <20260513191434.7db663fe@kernel.org> (raw)
In-Reply-To: <20260511233159.2558165-3-grzegorz.nitka@intel.com>
On Tue, 12 May 2026 01:31:53 +0200 Grzegorz Nitka wrote:
> --- a/drivers/dpll/dpll_core.h
> +++ b/drivers/dpll/dpll_core.h
> @@ -59,6 +59,7 @@ struct dpll_pin {
> u32 pin_idx;
> u64 clock_id;
> struct module *module;
> + char module_name[MODULE_NAME_LEN];
> struct fwnode_handle *fwnode;
> struct xarray dpll_refs;
> struct xarray parent_refs;
Warning: drivers/dpll/dpll_core.h:70 struct member 'module_name' not described in 'dpll_pin'
--
pw-bot: cr
next prev parent reply other threads:[~2026-05-14 2:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 23:31 [Intel-wired-lan] [PATCH v8 net-next 0/8] dpll/ice: Add generic DPLL type and full TX reference clock control for E825 Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 1/8] dpll: add generic DPLL type Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 2/8] dpll: allow registering FW-identified pin with a different DPLL Grzegorz Nitka
2026-05-14 2:14 ` Jakub Kicinski [this message]
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 3/8] dpll: extend pin notifier with notification source ID Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 4/8] dpll: allow fwnode pins to attempt state change without capability bit Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 5/8] ice: introduce TXC DPLL device and TX ref clock pin framework for E825 Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 6/8] ice: implement CPI support for E825C Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 7/8] ice: add Tx reference clock index handling to AN restart command Grzegorz Nitka
2026-05-11 23:31 ` [Intel-wired-lan] [PATCH v8 net-next 8/8] ice: implement E825 TX ref clock control and TXC hardware sync status Grzegorz Nitka
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