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25 Sep 2026 16:58:03 -0700 X-CSE-ConnectionGUID: zTLamPe6SSaoNAVQw/OSwA== X-CSE-MsgGUID: kiOKAJbMQVmTee/SmjzrvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,123,1787036400"; d="scan'208";a="300731120" Received: from orcnseosdtjek.jf.intel.com (HELO [10.166.28.109]) ([10.166.28.109]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2026 16:58:02 -0700 From: Jacob Keller Date: Fri, 25 Sep 2026 16:56:39 -0700 Subject: [PATCH iwl-net v3 07/15] ice: E822: cancel offset verification work during reset preparation MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260925-jk-e825c-timestamp-processing-logic-fixes-srcu-v3-7-6532598e8da8@intel.com> References: <20260925-jk-e825c-timestamp-processing-logic-fixes-srcu-v3-0-6532598e8da8@intel.com> In-Reply-To: <20260925-jk-e825c-timestamp-processing-logic-fixes-srcu-v3-0-6532598e8da8@intel.com> To: Intel Wired LAN , Maciej Machnikowski , Jacob Keller , Przemyslaw Korba , Anthony Nguyen , Grzegorz Nitka , Arkadiusz Kubalewski Cc: Jacob Keller , Aleksandr Loktionov , Arkadiusz Kubalewski , Przemyslaw Korba , Maciek Machnikowski X-Mailer: b4 0.17-dev-8b7ea X-Developer-Signature: v=1; a=openpgp-sha256; l=2365; i=jacob.e.keller@intel.com; h=from:subject:message-id; bh=K5fn26b9QsNTZ5g53c34wse0O5O+1y1s247X4YTHg3Q=; b=owGbwMvMwCWWNS3WLp9f4wXjabUkhqztXJUPtMIN+eNczjyx2/r9Wvq3/SbyNn7m19WztMPWi x9jnRvSUcrCIMbFICumyKLgELLyuvGEMK03znIwc1iZQIYwcHEKwET+qDMyXLlvm+T842b7p9LH Kvun15V4PrPZ0jr975N7f+/dz23dNZmRYfsF4Zr45nlX30iZeuy+ulpk5ccJTx+f/flRLlLqUuP pbHYA X-Developer-Key: i=jacob.e.keller@intel.com; a=openpgp; fpr=204054A9D73390562AEC431E6A965D3E6F0F28E8 X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org From: Karol Kolacinski The offset verification work task for E822 is executed after a PHY restart to complete vernier calibration. In the event that either Tx or Rx calibration hasn't finished, it may still be executing when a reset occurs. A single PF reset does not trigger a PHY restart, but larger resets (CORE, GLOBAL, EMP) will initiate a PHY restart. The ice_ptp_wait_for_offsets() function does check if the driver is resetting, and will reschedule itself. However, it is possible that a given execution is already past this check. The function may then fail to access the sideband queue. It treats failures as a reason to re-schedule and check again later. This re-schedule will then see the updated reset state via ice_is_reset_in_progress() and will keep re-scheduling until the reset finishes. The larger resets will restart the PHY, canceling any outstanding vernier calibration and forcing a restart. Preemptively cancel the task for non-PF resets to avoid doing unnecessary checks while resetting. The task is not canceled for a PF reset, otherwise nothing would restart the task to finish vernier calibration after the reset. Fixes: 95af1f1c4c9f ("ice: reschedule ice_ptp_wait_for_offset_valid during reset") Signed-off-by: Karol Kolacinski Reviewed-by: Aleksandr Loktionov Signed-off-by: Arkadiusz Kubalewski Signed-off-by: Przemyslaw Korba Reviewed-by: Maciek Machnikowski Signed-off-by: Jacob Keller --- drivers/net/ethernet/intel/ice/ice_ptp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 7f82439c47ee..7cc151b01a13 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -3006,6 +3006,9 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) if (reset_type == ICE_RESET_PFR) return; + if (hw->mac_type == ICE_MAC_GENERIC) + kthread_cancel_delayed_work_sync(&ptp->port.ov_work); + if (ice_pf_src_tmr_owned(pf) && hw->mac_type == ICE_MAC_GENERIC_3K_E825) ice_ptp_prepare_rebuild_sec(pf, false, reset_type); -- 2.56.0.rc0.395.gd1f3524e15dc