From: Tony Nguyen <anthony.l.nguyen@intel.com>
To: Karol Kolacinski <karol.kolacinski@intel.com>,
<intel-wired-lan@lists.osuosl.org>
Subject: Re: [Intel-wired-lan] [PATCH v2 net-next] ice: Add low latency Tx timestamp read
Date: Fri, 29 Jul 2022 10:58:33 -0700 [thread overview]
Message-ID: <83bb303e-c23e-0df6-95c0-954515b2dffb@intel.com> (raw)
In-Reply-To: <20220728125310.989781-1-karol.kolacinski@intel.com>
On 7/28/2022 5:53 AM, Karol Kolacinski wrote:
> E810 products can support low latency Tx timestamp register read.
> This requires usage of threaded IRQ instead of kthread to reduce the
> kthread start latency (spikes up to 20 ms).
> Add a check for the device capability and use the new method if
> supported.
>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
This doesn't apply anymore after Jake's patches[1] have been applied.
Can you rebase and resend?
[1]
https://lore.kernel.org/intel-wired-lan/20220727231602.1625980-1-jacob.e.keller@intel.com/
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prev parent reply other threads:[~2022-07-29 17:58 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-28 12:53 [Intel-wired-lan] [PATCH v2 net-next] ice: Add low latency Tx timestamp read Karol Kolacinski
2022-07-29 17:58 ` Tony Nguyen [this message]
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