Re: [Intel-wired-lan] Intel E810-XXVDA2: Too high TX timestamp read latency

[Jacob Keller <jacob.e.keller@intel.com>]

On 2/23/2024 5:07 AM, Martin Kulas wrote:
> Dear Karol,
> 
> On Thu, Feb 22, 2024 at 05:30:09PM +0000, Kolacinski, Karol wrote:
> [...]
>>
>> On Tue, Feb 20, 2024 at 2:17PM +0100, Martin Kulas wrote:
>>>
>>> After having applied that commit,  the TX timestamp read latency stays
>>> unacceptable high (in the range of about 700 microseconds), i.e. no
>>> regression.
>>
>> This improvement utilises 'low latency read', where the driver writes
>> a timestamp request to a specific register, FW has to poll this
>> register every 0.6 ms and then the driver receives a second interrupt,
>> so that it can read the timestamp from this register.
>> Unfortunately, polling every 0.6 ms is the best we could do.
> 
> 
> Thank you very much for your explanation!
> 
> The fact the the firmware (FW) polls the TX timestamp register every 600
> microseconds explains the TX timestamp read latency of my application of
> 700 microseconds.
> 
> Since it is a firmware problem:  A updated firmware with customizable 
> polling rate would enable low TX hardware timestamp read latencies.  Right?
> 
> 
> Currently,  I am looking for other Ethernetcards with TX hardware
> timestamping capability.  I am not sure whether the Intel X710-DA2 (i40e) 
> supports TX hardware timestamps for all outgoing packets and not only
> for PTP packets.  Do you know the timestamping capabilities of that card by
> any chance?  The datasheet of that Ethernet card is not completely clear
> about it.
> 

The 700 series can timestamp any outgoing Tx frame as long as its not
part of a TCP Segmentation Offload. It is limited for Rx timestamping to
only frames it recognizes as PTP, but this limitation does not apply for Tx.

As with the 500 series cards, this device is limited to a single
outstanding Tx timestamp request per PF. You can't initiate a second Tx
timestamp until the first completes.

> [...]
> 
> 
> Kind regards,
> Martin
>