From: Jiri Pirko <jiri@resnulli.us>
To: Vitaly Grinberg <vgrinber@redhat.com>
Cc: geert+renesas@glider.be, linux-doc@vger.kernel.org,
razor@blackwall.org, phil@nwl.cc, jesse.brandeburg@intel.com,
edumazet@google.com,
Benjamin Tissoires <benjamin.tissoires@redhat.com>,
anthony.l.nguyen@intel.com, netdev@vger.kernel.org,
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corbet@lwn.net, linux-rdma@vger.kernel.org, masahiroy@kernel.org,
Michael Tsirkin <mst@redhat.com>,
Javier Martinez Canillas <javierm@redhat.com>,
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kuba@kernel.org, vadfed@fb.com, Paolo Abeni <pabeni@redhat.com>,
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jonathan.lemon@gmail.com, saeedm@nvidia.com, davem@davemloft.net,
milena.olech@intel.com, hkallweit1@gmail.com
Subject: Re: [Intel-wired-lan] [RFC PATCH v8 00/10] Create common DPLL configuration API
Date: Thu, 29 Jun 2023 10:22:34 +0200 [thread overview]
Message-ID: <ZJ0/StDYFANB1COA@nanopsycho> (raw)
In-Reply-To: <CACLnSDhkUA=19905RKk=f1WBkd3jTEDcvytJCgavi90FroXb5w@mail.gmail.com>
Thu, Jun 22, 2023 at 09:44:19AM CEST, vgrinber@redhat.com wrote:
>Hi,
>Could it be possible to add PPS DPLL phase offset to the netlink API? We
>are relying on it in the E810-based grandmaster implementation.
In which driver you need to implement this?
>Thanks,
>Vitaly
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next prev parent reply other threads:[~2023-06-29 8:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-22 7:44 [Intel-wired-lan] [RFC PATCH v8 00/10] Create common DPLL configuration API Vitaly Grinberg
2023-06-29 8:22 ` Jiri Pirko [this message]
2023-06-29 8:26 ` Vitaly Grinberg
2023-06-29 10:03 ` Jiri Pirko
-- strict thread matches above, loose matches on Subject: below --
2023-06-22 7:54 Vitaly Grinberg
2023-06-09 12:18 Arkadiusz Kubalewski
2023-06-09 23:27 ` Jakub Kicinski
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