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Thu, 21 Dec 2023 16:26:38 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp4.osuosl.org 6262A42238 X-IronPort-AV: E=McAfee;i="6600,9927,10931"; a="3232834" X-IronPort-AV: E=Sophos;i="6.04,293,1695711600"; d="scan'208";a="3232834" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Dec 2023 08:26:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10931"; a="847157610" X-IronPort-AV: E=Sophos;i="6.04,293,1695711600"; d="scan'208";a="847157610" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Dec 2023 08:26:18 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rGLsE-00000007tTx-3bFd; Thu, 21 Dec 2023 18:26:14 +0200 Date: Thu, 21 Dec 2023 18:26:14 +0200 From: Andy Shevchenko To: lakshmi.sowjanya.d@intel.com Message-ID: References: <20231221093254.9599-1-lakshmi.sowjanya.d@intel.com> <20231221093254.9599-9-lakshmi.sowjanya.d@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231221093254.9599-9-lakshmi.sowjanya.d@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1703175998; x=1734711998; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=hwyVMnz8YfEfXRJSEPnKQv9pdm2VBlr6t+hTTgnb3c4=; b=EFd23QKGxwTeKywQx58sDVthcyp+ny2B168FJl9UmPLaUR2VKCFcEccR QGq3UhM8QboCMBEgJ99BcupTrDsGGv/x/yXxuWc1wn4Oc8dWUv3diYPw1 XU77GiFFGJ/aRNVhMNUanrlmWq0+gLUd9EnufVJ1mzDK7tjZi9ZnkVnvt nCVdRYPU9jMqeGNgnsOtJlzz6VE0fgdd23SPkAdwUGS9uZxxiBkR1hWLd v2I8Peclz/bcdbD+kPuD0aPCwOUa3h0A8Fg4uGaPy0ftovatY7IgcHPJw o9MFJbHOFoTrKa8r3IuFfW/Rnfpmgs5IfqXmiUwpirF/J2w1e19Z+hi81 A==; X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=EFd23QKG Subject: Re: [Intel-wired-lan] [RFC PATCH v2 08/10] pps: generators: Add PPS Generator TIO Driver X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-doc@vger.kernel.org, mallikarjunappa.sangannavar@intel.com, alexandre.torgue@foss.st.com, perex@perex.cz, anthony.l.nguyen@intel.com, thejesh.reddy.t.r@intel.com, christopher.s.hall@intel.com, corbet@lwn.net, x86@kernel.org, jesse.brandeburg@intel.com, joabreu@synopsys.com, intel-wired-lan@lists.osuosl.org, linux-sound@vger.kernel.org, tglx@linutronix.de, giometti@enneenne.com, netdev@vger.kernel.org, pandith.n@intel.com, eddie.dong@intel.com, linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com, jstultz@google.com, davem@davemloft.net Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" On Thu, Dec 21, 2023 at 03:02:52PM +0530, lakshmi.sowjanya.d@intel.com wrote: > From: Lakshmi Sowjanya D > > The Intel Timed IO PPS generator driver outputs a PPS signal using > dedicated hardware that is more accurate than software actuated PPS. > The Timed IO hardware generates output events using the ART timer. > The ART timer period varies based on platform type, but is less than 100 > nanoseconds for all current platforms. Timed IO output accuracy is > within 1 ART period. > > PPS output is enabled by writing '1' the 'enable' sysfs attribute. The > driver uses hrtimers to schedule a wake-up 10 ms before each event > (edge) target time. At wakeup, the driver converts the target time in > terms of CLOCK_REALTIME to ART trigger time and writes this to the Timed > IO hardware. The Timed IO hardware generates an event precisely at the > requested system time without software involvement. ... > +#include > +#include > +#include + container_of.h > +#include + device.h + err.h + hrtimer.h > +#include + kstrtox.h > +#include > +#include > +#include + spinlock.h + sysfs.h > +#include > +#include -- With Best Regards, Andy Shevchenko _______________________________________________ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan