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Miller" References: <20260108182318.20935-1-ivecera@redhat.com> <20260108182318.20935-2-ivecera@redhat.com> <20260109-wonderful-acoustic-civet-e030da@quoll> Content-Language: en-US From: Ivan Vecera In-Reply-To: <20260109-wonderful-acoustic-civet-e030da@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1767954139; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1X6VjjSDBSXJE0ymL3SGMh0l4uxNAcGGXw1ekS2+I5g=; b=U3pPfqTql/pe6xSuGjuWN6cW41+Gnvzt4TVUkNsNkJQ+INFM8MrZGPRQD5r8lwMi7wHDO7 EvrPPyn7sEYhXYUPVMP8ZFGqokyGDg1Hr6xu06Fmx/zxuz6RlVGDZCdtAUOetlqPjoKC7Q L+OikqoOnynPccC7IkYRtH7U42mc81k= X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=U3pPfqTq Subject: Re: [Intel-wired-lan] [PATCH net-next 01/12] dt-bindings: dpll: add common dpll-pin-consumer schema X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" On 1/9/26 10:48 AM, Krzysztof Kozlowski wrote: > On Thu, Jan 08, 2026 at 07:23:07PM +0100, Ivan Vecera wrote: >> Introduce a common schema for DPLL pin consumers. Devices such as Ethernet >> controllers and PHYs may require connections to DPLL pins for Synchronous >> Ethernet (SyncE) or other frequency synchronization tasks. >> >> Defining these properties in a shared schema ensures consistency across >> different device types that consume DPLL resources. >> >> Signed-off-by: Ivan Vecera >> --- >> .../bindings/dpll/dpll-pin-consumer.yaml | 30 +++++++++++++++++++ >> MAINTAINERS | 1 + >> 2 files changed, 31 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml >> >> diff --git a/Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml b/Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml >> new file mode 100644 >> index 0000000000000..60c184c18318a >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dpll/dpll-pin-consumer.yaml >> @@ -0,0 +1,30 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/dpll/dpll-pin-consumer.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: DPLL Pin Consumer >> + >> +maintainers: >> + - Ivan Vecera >> + > > You miss select. Without it this binding is no-op. Will fix. >> +description: | > > Drop | Will do. >> + Common properties for devices that require connection to DPLL (Digital Phase >> + Locked Loop) pins for frequency synchronization (e.g. SyncE). >> + >> +properties: >> + dpll-pins: >> + $ref: /schemas/types.yaml#/definitions/phandle-array >> + description: >> + List of phandles to the DPLL pin nodes connected to this device. >> + >> + dpll-pin-names: >> + $ref: /schemas/types.yaml#/definitions/string-array >> + description: >> + Names for the DPLL pins defined in 'dpll-pins', in the same order. >> + >> +dependencies: >> + dpll-pin-names: [ dpll-pins ] > > Binding should go to dtschema. See also commit > 3282a891060aace02e3eed4789739768060cea32 in dtschema or other examples > how to add new provider/consumer properties. Will do. Thanks for advice... Ivan