From: Przemek Kitszel <przemyslaw.kitszel@intel.com>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: <netdev@vger.kernel.org>, <anthony.l.nguyen@intel.com>,
<intel-wired-lan@lists.osuosl.org>
Subject: Re: [Intel-wired-lan] [PATCH v3 iwl-net 0/4] Fix E825 initialization
Date: Tue, 29 Oct 2024 09:33:32 +0100 [thread overview]
Message-ID: <b6abb7f2-22a3-4e93-a201-292e2b5f907b@intel.com> (raw)
In-Reply-To: <20241028204543.606371-1-grzegorz.nitka@intel.com>
On 10/28/24 21:45, Grzegorz Nitka wrote:
> E825 products have incorrect initialization procedure, which may lead to
> initialization failures and register values.
>
> Fix E825 products initialization by adding correct sync delay, checking
> the PHY revision only for current PHY and adding proper destination
> device when reading port/quad.
>
> In addition, E825 uses PF ID for indexing per PF registers and as
> a primary PHY lane number, which is incorrect.
>
> Karol Kolacinski (4):
> ice: Fix E825 initialization
> ice: Fix quad registers read on E825
> ice: Fix ETH56G FC-FEC Rx offset value
> ice: Add correct PHY lane assignment
Grzegorz, thank you for picking this series up!
It is legally required that you sign-off too, but please wait for other
feedback instead of rushing with re-send ;)
>
> .../net/ethernet/intel/ice/ice_adminq_cmd.h | 1 +
> drivers/net/ethernet/intel/ice/ice_common.c | 47 ++-
> drivers/net/ethernet/intel/ice/ice_common.h | 1 +
> drivers/net/ethernet/intel/ice/ice_main.c | 6 +-
> drivers/net/ethernet/intel/ice/ice_ptp.c | 23 +-
> drivers/net/ethernet/intel/ice/ice_ptp.h | 4 +-
> .../net/ethernet/intel/ice/ice_ptp_consts.h | 77 +----
> drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 281 ++++++++++--------
> drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 37 ++-
> drivers/net/ethernet/intel/ice/ice_sbq_cmd.h | 7 +-
> drivers/net/ethernet/intel/ice/ice_type.h | 2 -
> 11 files changed, 247 insertions(+), 239 deletions(-)
>
> V2 -> V3: Removed net-next hunks from "ice: Fix E825 initialization",
> replaced lower/upper_32_bits calls with lower/upper_16_bits
> in "ice: Fix quad registers read on E825",
> improved ice_get_phy_lane_number function in "ice: Add correct
> PHY lane assignment"
> V1 -> V2: Removed net-next hunks from "ice: Fix E825 initialization",
> whole "ice: Remove unnecessary offset calculation for PF
> scoped registers" patch and fixed kdoc in "ice: Fix quad
> registers read on E825"
>
> base-commit: 19acd6818aa7404d96cd5d0e4373d4ebe71448c2
next prev parent reply other threads:[~2024-10-29 8:33 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-28 20:45 [Intel-wired-lan] [PATCH v3 iwl-net 0/4] Fix E825 initialization Grzegorz Nitka
2024-10-28 20:45 ` [Intel-wired-lan] [PATCH v3 iwl-net 1/4] ice: " Grzegorz Nitka
2024-10-28 20:45 ` [Intel-wired-lan] [PATCH v3 iwl-net 2/4] ice: Fix quad registers read on E825 Grzegorz Nitka
2024-11-02 15:10 ` Simon Horman
2024-11-04 14:56 ` Nitka, Grzegorz
2024-10-28 20:45 ` [Intel-wired-lan] [PATCH v3 iwl-net 3/4] ice: Fix ETH56G FC-FEC Rx offset value Grzegorz Nitka
2024-10-28 20:45 ` [Intel-wired-lan] [PATCH v3 iwl-net 4/4] ice: Add correct PHY lane assignment Grzegorz Nitka
2024-10-29 8:33 ` Przemek Kitszel [this message]
2024-11-02 15:12 ` [Intel-wired-lan] [PATCH v3 iwl-net 0/4] Fix E825 initialization Simon Horman
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