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Tue, 03 Feb 2026 12:17:08 -0500 X-MC-Unique: Vn56I230NhuLOl4ARr0TCw-1 X-Mimecast-MFC-AGG-ID: Vn56I230NhuLOl4ARr0TCw_1770139024 Received: from mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 424DC1954204; Tue, 3 Feb 2026 17:17:03 +0000 (UTC) Received: from [10.45.224.28] (unknown [10.45.224.28]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 791DC19560B4; Tue, 3 Feb 2026 17:16:56 +0000 (UTC) Message-ID: Date: Tue, 3 Feb 2026 18:16:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird To: Simon Horman References: <20260202171638.17427-10-ivecera@redhat.com> <20260203161120.1894163-1-horms@kernel.org> Content-Language: en-US From: Ivan Vecera In-Reply-To: <20260203161120.1894163-1-horms@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1770139033; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W7bWkTI4zqaEsibgzb4DhWv0fCgI0/Cq4xXCwoJlLUw=; b=CqiF60qhRAf3sf9lrWX3sGcv1JJyp92cMbOrhojGmVTC7VstpzhuUmRd9PbPPFPBaDCkcd BOkIRp1R5AeQst8JPo24n0QK6Zi/0AB1mH8mzDHkrMi3d4GudgkjWGiEclFNVh0FSpECDN SZ6b2HpUcRIigw36ox2dtDdea1WydTQ= X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=CqiF60qh Subject: Re: [Intel-wired-lan] [net-next, v4, 9/9] ice: dpll: Support E825-C SyncE and dynamic pin discovery X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edumazet@google.com, anthony.l.nguyen@intel.com, leon@kernel.org, andrew+netdev@lunn.ch, linux-rdma@vger.kernel.org, przemyslaw.kitszel@intel.com, arkadiusz.kubalewski@intel.com, aleksandr.loktionov@intel.com, intel-wired-lan@lists.osuosl.org, kuba@kernel.org, pabeni@redhat.com, jiri@resnulli.us, richardcochran@gmail.com, Prathosh.Satish@microchip.com, vadim.fedorenko@linux.dev, netdev@vger.kernel.org, mbloch@nvidia.com, linux-kernel@vger.kernel.org, tariqt@nvidia.com, aleksander.lobakin@intel.com, jonathan.lemon@gmail.com, saeedm@nvidia.com, davem@davemloft.net Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" On 2/3/26 5:11 PM, Simon Horman wrote: > This is an AI-generated review of your patch. The human sending this > email has considered the AI review valid, or at least plausible. > > For local reproduction steps seehttps://netdev-ai.bots.linux.dev/ai-local.html > --- > ice: dpll: Support E825-C SyncE and dynamic pin discovery > > This patch implements SyncE support for the E825-C Ethernet controller > using the DPLL subsystem, with dynamic pin discovery via firmware (ACPI) > and asynchronous registration using the DPLL notifier chain. > >> diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c >> index 4eca62688d83..a8c99e49bfae 100644 >> --- a/drivers/net/ethernet/intel/ice/ice_dpll.c >> +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c > [ ... ] > >> @@ -528,6 +529,92 @@ ice_dpll_pin_disable(struct ice_hw *hw, struct ice_dpll_pin *pin, >> return ret; >> } >> >> +/** >> + * ice_dpll_rclk_update - updates the state of rclk pin on a device >> + * @pf: private board struct >> + * @pin: pointer to a pin >> + * @port_num: port number >> + * >> + * Update struct holding pin states info, states are separate for each parent >> + * >> + * Context: Called under pf->dplls.lock >> + * Return: >> + * * 0 - OK >> + * * negative - error >> + */ >> +static int ice_dpll_rclk_update(struct ice_pf *pf, struct ice_dpll_pin *pin, >> + u8 port_num) >> +{ >> + int ret; >> + >> + for (u8 parent = 0; parent < pf->dplls.rclk.num_parents; parent++) { >> + ret = ice_aq_get_phy_rec_clk_out(&pf->hw, &parent, &port_num, >> + &pin->flags[parent], NULL); > Is it safe to pass &parent as an output parameter when it's also the loop > counter? Looking at ice_aq_get_phy_rec_clk_out(): > > int ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, ...) > { > cmd->phy_output = *phy_output; // Read as input > status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); > if (!status) { > *phy_output = cmd->phy_output; // Write back from firmware > ... > > The firmware could potentially return a different value than was sent, > which would be written back to 'parent', corrupting the loop counter. > > This corrupted value is then used as an array index: > >> + if (ret) >> + return ret; >> + >> + ice_dpll_pin_store_state(pin, parent, >> + ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN & >> + pin->flags[parent]); > Both pin->flags[parent] and pin->state[parent] (inside > ice_dpll_pin_store_state) could access out of bounds if firmware returns > a value >= ICE_DPLL_RCLK_NUM_MAX (which is 2). > > Would it be safer to use a separate variable for the phy_output parameter > and validate that firmware echoes back the expected value? Yes, there should be a separate variable like in previous code prior this refactor... case ICE_DPLL_PIN_TYPE_RCLK_INPUT: - for (parent = 0; parent < pf->dplls.rclk.num_parents; - parent++) { - u8 p = parent; <--- HERE - - ret = ice_aq_get_phy_rec_clk_out(&pf->hw, &p, - &port_num, - &pin->flags[parent], - NULL); Arek, I will fix it by myself. Thanks, Ivan