From: Paul Menzel <pmenzel@molgen.mpg.de>
To: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
dan.carpenter@linaro.org, horms@kernel.org,
Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH iwl-next 1/2] ixgbe: e610: add missing endianness conversion
Date: Fri, 16 Jan 2026 14:17:30 +0100 [thread overview]
Message-ID: <c2a61a49-e84a-447e-a45a-61a44a5393d0@molgen.mpg.de> (raw)
In-Reply-To: <20260116122353.78235-1-piotr.kwapulinski@intel.com>
Dear Piotr,
Thank you for your patch.
Am 16.01.26 um 13:23 schrieb Piotr Kwapulinski:
> Fix a possible ACI issue on big-endian platforms.
Please elaborate, why this is needed, and `raw_desc[i]` needs to be
converted.
For the summary/title, you could also be more specific. Something like:
> ixgbe: e610: Convert ACI descriptor buffer(?) to little endian
> Fixes: 46761fd52a88 ("ixgbe: Add support for E610 FW Admin Command Interface")
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
> ---
> drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
> index c2f8189..f494e90 100644
> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
> @@ -113,7 +113,8 @@ static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,
>
> /* Descriptor is written to specific registers */
> for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++)
> - IXGBE_WRITE_REG(hw, IXGBE_PF_HIDA(i), raw_desc[i]);
> + IXGBE_WRITE_REG(hw, IXGBE_PF_HIDA(i),
> + le32_to_cpu(raw_desc[i]));
>
> /* SW has to set PF_HICR.C bit and clear PF_HICR.SV and
> * PF_HICR_EV
> @@ -145,7 +146,7 @@ static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,
> if ((hicr & IXGBE_PF_HICR_SV)) {
> for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) {
> raw_desc[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIDA(i));
> - raw_desc[i] = raw_desc[i];
> + raw_desc[i] = cpu_to_le32(raw_desc[i]);
> }
> }
>
> @@ -153,7 +154,7 @@ static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,
> if ((hicr & IXGBE_PF_HICR_EV) && !(hicr & IXGBE_PF_HICR_C)) {
> for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) {
> raw_desc[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIDA_2(i));
> - raw_desc[i] = raw_desc[i];
> + raw_desc[i] = cpu_to_le32(raw_desc[i]);
> }
> }
Kind regards,
Paul
next prev parent reply other threads:[~2026-01-16 13:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 12:23 [Intel-wired-lan] [PATCH iwl-next 1/2] ixgbe: e610: add missing endianness conversion Piotr Kwapulinski
2026-01-16 13:17 ` Paul Menzel [this message]
2026-01-19 16:03 ` Kwapulinski, Piotr
2026-01-17 13:34 ` kernel test robot
2026-01-18 12:56 ` Dan Carpenter
2026-01-19 16:07 ` Kwapulinski, Piotr
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