Re: [Intel-wired-lan] [PATCH iwl-net v3] igc: fix race condition in TX timestamp read for register 0

[Dawid Osuchowski <dawid.osuchowski@linux.intel.com>]

On 2025-11-27 4:11 PM, Chwee-Lin Choong wrote:
> The current HW bug workaround checks the TXTT_0 ready bit first,
> then reads TXSTMPL_0 twice (before and after reading TXSTMPH_0)
> to detect whether a new timestamp was captured by timestamp
> register 0 during the workaround.
> 
> This sequence has a race: if a new timestamp is captured after
> checking the TXTT_0 bit but before the first TXSTMPL_0 read, the
> detection fails because both the “old” and “new” values come from
> the same timestamp.
> 
> Fix by reading TXSTMPL_0 first to establish a baseline, then
> checking the TXTT_0 bit. This ensures any timestamp captured
> during the race window will be detected.
> 
> Old sequence:
>    1. Check TXTT_0 ready bit
>    2. Read TXSTMPL_0 (baseline)
>    3. Read TXSTMPH_0 (interrupt workaround)
>    4. Read TXSTMPL_0 (detect changes vs baseline)
> 
> New sequence:
>    1. Read TXSTMPL_0 (baseline)
>    2. Check TXTT_0 ready bit
>    3. Read TXSTMPH_0 (interrupt workaround)
>    4. Read TXSTMPL_0 (detect changes vs baseline)
> 
> Fixes: c789ad7cbebc ("igc: Work around HW bug causing missing timestamps")
> Suggested-by: Avi Shalev <avi.shalev@intel.com>
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>

...

> Signed-off-by: Song Yoong Siang <yoong.siang.song@intel.com>
> Signed-off-by: Chwee-Lin Choong <chwee.lin.choong@intel.com>

I don't understand the double sign-off here. Did Song Yoong Siang 
co-develop this fix or you are upstreaming a change they made somewhere 
else?

Please take a look at the documentation [1] regarding signing your work, 
especially the use of Co-developed-by tags in case there were multiple 
authors and/or proper From tag if you are submitting on someone's behalf.

[1] 
https://docs.kernel.org/process/submitting-patches.html#when-to-use-acked-by-cc-and-co-developed-by

Best regards,
Dawid