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receiver= Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=quarantine dis=none) header.from=kernel.org Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=Jqeh8v5r Received: from tor.source.kernel.org (tor.source.kernel.org [IPv6:2600:3c04:e001:324:0:1991:8:25]) by smtp3.osuosl.org (Postfix) with ESMTPS id B72A860A59 for ; Sat, 24 Oct 2026 01:46:07 +0000 (UTC) Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 87A2E6022A; Sat, 24 Oct 2026 01:46:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0B0091F01825; Sat, 24 Oct 2026 01:46:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792806365; bh=67nt2V9T9b7i3n6o+SNpKU/A0QwgmwBNIenDDt1itYY=; h=From:Subject:Reply-To:To:In-Reply-To:References:Date; b=Jqeh8v5rH+auSskzNFPEf/IiDJv94uRhMSepsmavlWrISC5XhTBVUKhH+OV7KdSqe kSRGZExRdwR3X7PCnsPNO4WSNpBVtRpvUUTrtwXO5wmFRDNUxxswktIQLfY2xBQKrG HQjIJL+FLBH3ViKkMBrohrSyvLjAGVdjJGUttqvKH3E2w+SN564zjahOK0S7I77B0l 9fj5ZMIclJTJKHRc/rVyUO4l/wMjHojP5xxHdhcohyWcP5AJLOkAEfi+lrvogxI5Fu E82BE60Rt0KP8CEh93FYpZMNa1kw+3fQazAOp+G14XFMDpdZt1EnmOjoC9ysGqMZ7e 5GCeWoU3goggQ== Message-ID: From: sashiko-bot@kernel.org Subject: Re: [PATCH iwl-net 1/2] ice: store cached PHC time in ice_adapter To: "Jacob Keller" , "Intel Wired LAN" In-Reply-To: <20261023-jk-e825-e830-timecounter-v1-1-e932602f0d16@intel.com> References: <20261023-jk-e825-e830-timecounter-v1-0-e932602f0d16@intel.com> <20261023-jk-e825-e830-timecounter-v1-1-e932602f0d16@intel.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Sat, 24 Oct 2026 01:46:04 +0000 X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: sashiko-reviews@lists.linux.dev X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 X-Archived-By: Thank you for your contribution! Sashiko AI review found 1 potential issue(= s) to consider: - [Medium] ice: stale shared phc.cached_time when clock-owning PF stops or = unbinds -- commit 866055ac7173935e690af3f73268e559a0698a8d Author: Jacob Keller ice: store cached PHC time in ice_adapter This commit moves the cached PHC time from per-PF and per-Rx-ring fields into a shared struct ice_phc embedded in struct ice_adapter, and updates only the clock-owning PF to refresh that shared value in its periodic work. > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ether= net/intel/ice/ice_ptp.c > index ec24c09280785..4b4a00beadd2c 100644 > --- a/drivers/net/ethernet/intel/ice/ice_ptp.c > +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c [ ... ] > @@ -987,35 +992,26 @@ static int ice_ptp_init_tx(struct ice_pf *pf, struc= t ice_ptp_tx *tx, u8 port) > } > =20 > /** > - * ice_ptp_update_cached_phctime - Update the cached PHC time values > + * ice_ptp_update_cached_phctime - Update the cached PHC time value > * @pf: Board specific private structure > * > - * This function updates the system time values which are cached in the = PF > - * structure and the Rx rings. > - * > - * This function must be called periodically to ensure that the cached v= alue > - * is never more than 2 seconds old. > + * Update the PTP hardware clock time values which are cached in the PHC > + * structure. > * > - * Note that the cached copy in the PF PTP structure is always updated, = even > - * if we can't update the copy in the Rx rings. > - * > - * Return: > - * * 0 - OK, successfully updated > - * * -EAGAIN - PF was busy, need to reschedule the update > - * * -ENODEV - no control PF owns the source clock register space > - * * -EOPNOTSUPP - PTP support is not compiled in > + * This function must be called periodically by the clock owner to ensur= e that > + * the cached value is never more than 2 seconds old. > */ > -static int ice_ptp_update_cached_phctime(struct ice_pf *pf) > +static void ice_ptp_update_cached_phctime(struct ice_pf *pf) > { > + struct ice_phc *phc =3D &pf->adapter->phc; > struct device *dev =3D ice_pf_to_dev(pf); > unsigned long update_before; > u64 systime; > - int err, i; > + int err; > =20 > - update_before =3D pf->ptp.cached_phc_jiffies + msecs_to_jiffies(2000); > - if (pf->ptp.cached_phc_time && > - time_is_before_jiffies(update_before)) { > - unsigned long time_taken =3D jiffies - pf->ptp.cached_phc_jiffies; > + update_before =3D phc->update_jiffies + msecs_to_jiffies(2000); > + if (phc->cached_time && time_is_before_jiffies(update_before)) { > + unsigned long time_taken =3D jiffies - phc->update_jiffies; > =20 > dev_warn(dev, "%u msecs passed between update to cached PHC time\n", > jiffies_to_msecs(time_taken)); > @@ -1032,36 +1028,12 @@ static int ice_ptp_update_cached_phctime(struct i= ce_pf *pf) > * longer tracks the PHC, and both treat a zero cache as > * "no timestamp". > */ > - systime =3D 0; > - WRITE_ONCE(pf->ptp.cached_phc_time, 0); > + WRITE_ONCE(phc->cached_time, 0); > } else { > - /* Update the cached PHC time stored in the PF structure */ > - WRITE_ONCE(pf->ptp.cached_phc_time, systime); > - WRITE_ONCE(pf->ptp.cached_phc_jiffies, jiffies); > + /* Update the cached PHC time stored in the PHC structure */ > + WRITE_ONCE(phc->cached_time, systime); > + WRITE_ONCE(phc->update_jiffies, jiffies); > } [ ... ] > @@ -3078,24 +3025,20 @@ static void ice_ptp_periodic_work(struct kthread_= work *work) > { > struct ice_ptp *ptp =3D container_of(work, struct ice_ptp, work.work); > struct ice_pf *pf =3D container_of(ptp, struct ice_pf, ptp); > - int err; > =20 > if (pf->ptp.state !=3D ICE_PTP_READY) > return; > =20 > ice_ptp_tspll_monitor(pf); > =20 > - err =3D ice_ptp_update_cached_phctime(pf); > + if (ice_pf_src_tmr_owned(pf)) > + ice_ptp_update_cached_phctime(pf); [Severity: Medium] What happens to pf->adapter->phc.cached_time on remaining PFs if the clock-owning PF is unbound, reset, or fails PTP rebuild? Previously, commit dcc2c9108e65 ("ice: Reject PTP access without a control PF") handled control PF removal by having each PF run ice_ptp_update_cached_phctime() from ice_ptp_periodic_work(). When the control PF went away, ice_ptp_read_src_clk_reg() returned -ENODEV on the secondary PFs, which cleared cached_phc_time and the Rx ring cached_phctime copies to 0. With this change, ice_ptp_periodic_work() in drivers/net/ethernet/intel/ice/ice_ptp.c only calls ice_ptp_update_cached_phctime() when ice_pf_src_tmr_owned(pf) is true (and the only other callers are ice_ptp_settime64() and ice_ptp_adjtime() via ice_ptp_reset_cached_phctime(), which also only run on the clock owner). Because ice_pf_src_tmr_owned(pf) guarantees ice_is_primary(&pf->hw) is true, ice_ptp_read_src_clk_reg() never returns -ENODEV here, making the error branch in ice_ptp_update_cached_phctime() that zeroes phc->cached_time unreachable. Meanwhile, when the clock-owning PF stops its periodic worker in ice_ptp_prepare_for_reset() or is unbound via ice_ptp_release() -> ice_ptp_cleanup_adapter(): drivers/net/ethernet/intel/ice/ice_ptp.c:ice_ptp_cleanup_adapter() { ... if (ice_get_ctrl_pf(pf) =3D=3D pf) { rcu_assign_pointer(pf->adapter->ctrl_pf, NULL); synchronize =3D true; } ... } nothing zeroes pf->adapter->phc.cached_time. Because the Rx path in ice_ptp_get_rx_hwts() -> ice_ptp_extend_32b_ts() only checks whether phc->cached_time is non-zero and does not check phc->update_jiffies, won't active sibling or secondary PFs continue extending 32-bit hardware Rx timestamps against the frozen phc->cached_time indefinitely? --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20261023-jk-e825-e8= 30-timecounter-v1-0-e932602f0d16@intel.com?part=3D1