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dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=e6l1/6y3 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by smtp2.osuosl.org (Postfix) with ESMTPS id 0D29440070 for ; Wed, 11 Nov 2026 09:44:17 +0000 (UTC) Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 3A9CC611A1; Wed, 11 Nov 2026 09:44:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B8FFB1F00A05; Wed, 11 Nov 2026 09:44:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1794390255; bh=FWbJeJftKQHqnOgAXghvbIxdB1i6Btj768VsDXvEWCQ=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=e6l1/6y33fu740MbdUFrffQv66r2r3Xhv45yke1jynHEWIci1fYCwpksoCktrT58m phAYjQ7A5lFmAblLOj3yJT5/80VRsK3rpnh8lAsl2HipEe5OET0Y417a3+/C9jAtFt /VpzwXYUA8hw6cmGO+cA3H48mZG08LhDa8OEL/B9cAc5fILUewDy/7XgnjvEUJRN6z +hIR3AFmxyDHVJ+9x+Yo2AVnsPmppTYA91BfI2gSXJtVVpEkciV+cU2Qzf1KkfCO4D luCYuhVnWBkMeqAN48eoUpov768hMuKfj2lIdi1IRMfa9qW2Sgsb+hJCmSwQqR5lpB 0PFFelPPuE10g== Message-ID: From: sashiko-bot@kernel.org Subject: Re: [PATCH net 1/2] ice: dpll: serialize changes of the SyncE CGU registers To: "Ivan Vecera" Cc: intel-wired-lan@lists.osuosl.org In-Reply-To: <20261110094350.184185-2-ivecera@redhat.com> References: <20261110094350.184185-1-ivecera@redhat.com> <20261110094350.184185-2-ivecera@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Wed, 11 Nov 2026 09:44:15 +0000 X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: sashiko-reviews@lists.linux.dev X-Spam-Status: No, score=-10.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 X-Archived-By: Thank you for your contribution! Sashiko AI review found no new issues in this patch, but noticed 1 related pre-existing issue it does not introduce: - [Medium] ice: wrong port modulo in ice_tspll_bypass_mux_active_e825c() [1] -- commit 54d93c3b2bb6d3588addc95fab52eae6473a669b Author: Ivan Vecera ice: dpll: serialize changes of the SyncE CGU registers This commit adds a mutex to struct ice_adapter to serialize read-modify-wri= te updates to the shared E825C SyncE CGU registers R10 and R11 across PFs. > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ether= net/intel/ice/ice_ptp.c > index 7980eaf9ce253..449819cf8c879 100644 > --- a/drivers/net/ethernet/intel/ice/ice_ptp.c > +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c > @@ -1368,7 +1368,9 @@ void ice_ptp_link_change(struct ice_pf *pf, bool li= nkup) > break; > } > =20 > + mutex_lock(&pf->adapter->cgu_synce_lock); > err =3D ice_tspll_cfg_synce_ethdiv_e825c(hw, clk_pin); > + mutex_unlock(&pf->adapter->cgu_synce_lock); > if (active && err) { > dev_err_once(ice_pf_to_dev(pf), > "Failed to configure SyncE ETH divider for pin %d, err %d\n", [Severity: Medium] This problem wasn't introduced by this patch, but does ice_tspll_bypass_mux_active_e825c() compute the wrong port index when setti= ng active here [1]? drivers/net/ethernet/intel/ice/ice_tspll.c:ice_tspll_bypass_mux_active_e825= c() { ... if (active_clk =3D=3D port % hw->ptp.ports_per_phy + ICE_CGU_BYPASS_MUX_OFFSET_E825C) *active =3D true; ... } ice_tspll_cfg_bypass_mux_e825c() programs the shared CGU mux with port_num + ICE_CGU_BYPASS_MUX_OFFSET_E825C without reducing port_num modulo ports_per_phy, and ice_dpll_rclk_update_e825c() checks it the same way. On dual-complex E825C, taking port % hw->ptp.ports_per_phy folds secondary complex ports 4..7 onto 0..3, so a secondary complex port is never recogniz= ed as active when selected and is falsely treated as active when the corresponding primary complex port is selected. [1] https://sashiko.dev/#/bug/linux-800face2-554f-486e-9268-16b7de29259d --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20261110094350.1841= 85-1-ivecera@redhat.com?part=3D1