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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5341.namprd11.prod.outlook.com (2603:10b6:5:390::22) by IA3PR11MB9399.namprd11.prod.outlook.com (2603:10b6:208:577::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.13; Tue, 16 Dec 2025 12:34:01 +0000 Received: from DM4PR11MB5341.namprd11.prod.outlook.com ([fe80::397:7566:d626:e839]) by DM4PR11MB5341.namprd11.prod.outlook.com ([fe80::397:7566:d626:e839%7]) with mapi id 15.20.9434.001; Tue, 16 Dec 2025 12:34:00 +0000 Message-ID: <000a8e58-48db-455f-bdf8-0de2d9ef782f@intel.com> Date: Tue, 16 Dec 2025 18:03:51 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 04/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff To: Mitul Golani , CC: , , , References: <20251202073659.926838-1-mitulkumar.ajitkumar.golani@intel.com> <20251202073659.926838-5-mitulkumar.ajitkumar.golani@intel.com> Content-Language: en-US From: "Nautiyal, Ankit K" In-Reply-To: <20251202073659.926838-5-mitulkumar.ajitkumar.golani@intel.com> Content-Type: text/plain; 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(Jani, Nikula) > > Signed-off-by: Ville Syrjälä > Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal > --- > drivers/gpu/drm/i915/display/intel_vrr.c | 56 ++++++++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_vrr.h | 5 +++ > 2 files changed, 61 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c > index b92c42fde937..31f3a7b6e00d 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -261,6 +261,12 @@ static int intel_vrr_hw_value(const struct intel_crtc_state *crtc_state, > return value - crtc_state->set_context_latency; > } > > +static int intel_vrr_vblank_start(const struct intel_crtc_state *crtc_state, > + int vmin_vmax) > +{ > + return intel_vrr_hw_value(crtc_state, vmin_vmax) - crtc_state->vrr.guardband; > +} > + > /* > * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to > * Vtotal value. > @@ -898,3 +904,53 @@ int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state) > return intel_vrr_vmin_vblank_start(crtc_state) - > crtc_state->set_context_latency; > } > + > +int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + u32 tmp = 0; > + > + tmp = intel_de_read(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_LIVE(cpu_transcoder)); > + > + if (REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_CNT_MASK, tmp) == 0) > + return -EINVAL; > + > + return intel_vrr_vblank_start(crtc_state, VRR_DCB_ADJ_FLIPLINE(tmp) + 1); > +} > + > +int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + u32 tmp = 0; > + > + tmp = intel_de_read(display, TRANS_VRR_DCB_ADJ_VMAX_CFG_LIVE(cpu_transcoder)); > + > + if (REG_FIELD_GET(VRR_DCB_ADJ_VMAX_CNT_MASK, tmp) == 0) > + return -EINVAL; > + > + return intel_vrr_vblank_start(crtc_state, VRR_DCB_ADJ_VMAX(tmp) + 1); > +} > + > +int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + u32 tmp = 0; > + > + tmp = intel_de_read(display, TRANS_VRR_DCB_FLIPLINE_LIVE(cpu_transcoder)); > + > + return intel_vrr_vblank_start(crtc_state, VRR_DCB_FLIPLINE(tmp) + 1); > +} > + > +int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + u32 tmp = 0; > + > + tmp = intel_de_read(display, TRANS_VRR_DCB_VMAX_LIVE(cpu_transcoder)); > + > + return intel_vrr_vblank_start(crtc_state, VRR_DCB_VMAX(tmp) + 1); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h > index bc9044621635..66fb9ad846f2 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.h > +++ b/drivers/gpu/drm/i915/display/intel_vrr.h > @@ -43,4 +43,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display); > int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state); > int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state); > > +int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state); > +int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state); > +int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state); > +int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state); > + > #endif /* __INTEL_VRR_H__ */