Re: [PATCH 08/11] drm/xe/xe2hpg: Limit chunk size to 4MiB for vram

["Jahagirdar, Akshata" <akshata.jahagirdar@intel.com>]

This patch was originally sent due to the flat ccs copy  i.e. 
XY_CTRL_SURF_COPY_BLT instruction limitations,
however after working on the implementation of BMG compression,
I have realised that we don't need this patch anymore.
The reason being that we don't need to handle the copying of ccs 
metadata during migration.
For eviction (VRAM -> SMEM) we use compressed -> uncompressed mapping.
But for SMEM -> VRAM we need uncompressed -> uncompressed mapping since 
we don't know
which pages were originally compressed. So, we don't need to handle the 
flat ccs copy here.
We can remove this patch from next series.

--Akshata

On 4/3/2024 5:06 PM, Matt Roper wrote:
> On Tue, Apr 02, 2024 at 06:17:21PM +0530, Balasubramani Vivekanandan wrote:
>> From: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
>>
>> Currently, The maximum chunk size for vram copy is 8 MiB, which means
>> flat ccs copy would be able handle 8 MiB/(page_sizes).  Since page size
>> for vram is 4k the value will be 2048 pages which won't fit in 10
>> bitspace.
>>
>> Therefore we need to limit chunk size to 4MiB the way it is for LNL.
> I found this explanation a bit hard to follow, you might want to clarify
> that it's the XY_CTRL_SURF_COPY_BLT instruction specifically that drives
> this limit.  I.e., the change on Xe2 is that the size provided to that
> instruction now represents one less than the number of 4K pages of the
> main surface for which CCS data needs to be copied.  Since that field is
> 10-bits, we can only copy CCS data that corresponds to 1024 * 4k.
>
> Although now I'm wondering when we actually wind up needing to copy CCS
> data directly on Xe2?  With compression controlled by PAT bits in the
> PTE, doesn't the writing of the FlatCCS metadata happen automatically on
> all main surface copies (both for compressed and non-compressed
> surfaces)?
>
>
> Matt
>
>> Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_migrate.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
>> index ee1bb938c493..07a09649787d 100644
>> --- a/drivers/gpu/drm/xe/xe_migrate.c
>> +++ b/drivers/gpu/drm/xe/xe_migrate.c
>> @@ -407,7 +407,7 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile)
>>   
>>   static u64 max_mem_transfer_per_pass(struct xe_device *xe)
>>   {
>> -	if (!IS_DGFX(xe) && xe_device_has_flat_ccs(xe))
>> +	if (GRAPHICS_VER(xe) >= 20 && xe_device_has_flat_ccs(xe))
>>   		return MAX_CCS_LIMITED_TRANSFER;
>>   
>>   	return MAX_PREEMPTDISABLE_TRANSFER;
>> -- 
>> 2.25.1
>>