From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 09/12] drm/i915/de: Add a simple intel_de_read64_2x32()
Date: Thu, 26 Mar 2026 13:41:20 +0200 [thread overview]
Message-ID: <07d608454976ffb769f6e020bdef318dab9f3e5e@intel.com> (raw)
In-Reply-To: <20260325185342.11482-10-ville.syrjala@linux.intel.com>
On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_de_read64_2x32_volatile() is a complex beast because
> it needs to deal with volatile register values. For simpler
> cases we can simply do a pair normal intel_de_read()s.
>
> My main reason for hating overuse of intel_de_read64_2x32_volatile()
> is that it makes register tracepoints confusing. It always
> does three accesses in the somewhat weird udw,ldw,udw order,
> confusing the reader of the trace. Much more clear if we just
> observe the two reads in the natural little endian order.
>
> We also have no non-volatile use case where the LDW and UDW
> are stored in non-consecutive registers, so we can just pass
> along a single register offset.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_de.h | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
> index 295e7176b732..624a0627b95c 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -53,6 +53,19 @@ intel_de_read64_2x32_volatile(struct intel_display *display,
> return val;
> }
>
> +static inline u64
> +intel_de_read64_2x32(struct intel_display *display,
> + i915_reg_t reg)
Could fit on one line, matter of taste I guess.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> +{
> + i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
> + u32 lower, upper;
> +
> + lower = intel_de_read(display, reg);
> + upper = intel_de_read(display, upper_reg);
> +
> + return (u64)upper << 32 | lower;
> +}
> +
> static inline void
> intel_de_posting_read(struct intel_display *display, i915_reg_t reg)
> {
--
Jani Nikula, Intel
next prev parent reply other threads:[~2026-03-26 11:41 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-25 18:53 [PATCH 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
2026-03-25 18:53 ` [PATCH 01/12] drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads Ville Syrjala
2026-03-26 9:15 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 02/12] drm/i915/mchbar: Provide intel_mchbar_read*() abstraction Ville Syrjala
2026-03-26 9:16 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror Ville Syrjala
2026-03-26 11:15 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 04/12] drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*() Ville Syrjala
2026-03-26 11:26 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 05/12] drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read() Ville Syrjala
2026-03-26 11:28 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 06/12] drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*() Ville Syrjala
2026-03-26 11:31 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 07/12] drm/i915/de: Add intel_de_read16() Ville Syrjala
2026-03-26 11:32 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 08/12] drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/ Ville Syrjala
2026-03-26 11:33 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 09/12] drm/i915/de: Add a simple intel_de_read64_2x32() Ville Syrjala
2026-03-26 11:41 ` Jani Nikula [this message]
2026-03-25 18:53 ` [PATCH 10/12] drm/i915/vrr: Use intel_de_read64_2x32() Ville Syrjala
2026-03-26 11:42 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 11/12] drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses Ville Syrjala
2026-03-26 11:44 ` Jani Nikula
2026-03-25 18:53 ` [PATCH 12/12] drm/i915/rom: Use intel_de for SPI ROM register access Ville Syrjala
2026-03-26 11:47 ` Jani Nikula
2026-03-25 19:30 ` ✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code Patchwork
2026-03-25 19:32 ` ✓ CI.KUnit: success " Patchwork
2026-03-30 16:05 ` ✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code (rev2) Patchwork
2026-03-30 16:06 ` ✓ CI.KUnit: success " Patchwork
2026-03-30 16:41 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-30 20:11 ` ✓ Xe.CI.FULL: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=07d608454976ffb769f6e020bdef318dab9f3e5e@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox