Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Dong, Zhanjun" <zhanjun.dong@intel.com>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v9 2/4] drm/xe/guc: Add XE_LP steered register lists
Date: Thu, 13 Jun 2024 19:02:28 +0000	[thread overview]
Message-ID: <0c692e7c7120ea2484ebb9c1056b6aba609c97b5.camel@intel.com> (raw)
In-Reply-To: <20240607000719.1012422-3-zhanjun.dong@intel.com>

I think u missed the RB from rev8 for this patch - i see the only
difference in rev9 was a trivial nit you fixed that was not blocking
rev8's RB. That said, repeating RB:

Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>

On Thu, 2024-06-06 at 17:07 -0700, Zhanjun Dong wrote:
> Add the ability for runtime allocation and freeing of
> steered register list extentions that depend on the
> detected HW config fuses.
> 
> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_capture.c      | 155 
alan:snip

  reply	other threads:[~2024-06-13 19:02 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-07  0:07 [PATCH v9 0/4] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
2024-06-07  0:07 ` [PATCH v9 1/4] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
2024-06-14 11:50   ` Michal Wajdeczko
2024-06-19 19:36     ` Dong, Zhanjun
2024-06-07  0:07 ` [PATCH v9 2/4] drm/xe/guc: Add XE_LP steered register lists Zhanjun Dong
2024-06-13 19:02   ` Teres Alexis, Alan Previn [this message]
2024-06-07  0:07 ` [PATCH v9 3/4] drm/xe/guc: Add capture size check in GuC log buffer Zhanjun Dong
2024-06-14 12:13   ` Michal Wajdeczko
2024-06-19 19:44     ` Dong, Zhanjun
2024-06-19 22:28       ` Michal Wajdeczko
2024-06-19 22:56         ` Dong, Zhanjun
2024-06-07  0:07 ` [PATCH v9 4/4] drm/xe/guc: Extract GuC capture lists to register snapshot Zhanjun Dong
2024-06-13 23:26   ` Teres Alexis, Alan Previn
2024-06-19 20:17     ` Dong, Zhanjun
2024-06-14 12:31   ` Michal Wajdeczko
2024-06-19 20:04     ` Dong, Zhanjun
2024-06-07  0:12 ` ✓ CI.Patch_applied: success for drm/xe/guc: Add GuC based register capture for error capture (rev9) Patchwork
2024-06-07  0:12 ` ✗ CI.checkpatch: warning " Patchwork
2024-06-07  0:13 ` ✓ CI.KUnit: success " Patchwork
2024-06-07  0:25 ` ✓ CI.Build: " Patchwork
2024-06-07  0:27 ` ✗ CI.Hooks: failure " Patchwork
2024-06-07  0:28 ` ✓ CI.checksparse: success " Patchwork
2024-06-07  1:11 ` ✓ CI.BAT: " Patchwork
2024-06-07 10:57 ` ✗ CI.FULL: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=0c692e7c7120ea2484ebb9c1056b6aba609c97b5.camel@intel.com \
    --to=alan.previn.teres.alexis@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=zhanjun.dong@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox