From: Riana Tauro <riana.tauro@intel.com>
To: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>,
<intel-xe@lists.freedesktop.org>
Subject: Re: [Intel-xe] [PATCH 1/2] RFC drm/xe: Disable ctb communication
Date: Wed, 23 Aug 2023 12:51:58 +0530 [thread overview]
Message-ID: <11b1121b-8c53-7818-dfed-9b26fd89d6f8@intel.com> (raw)
In-Reply-To: <ZOWn9E+FKZ3NVCiX@bvivekan-mobl>
Hi Bala
Thanks for the review
On 8/23/2023 12:02 PM, Balasubramani Vivekanandan wrote:
> On 23.08.2023 10:39, Riana Tauro wrote:
>> During Runtime suspend, GuC is reset for both D0->D3hot/D3Cold
>> transistions. It is not necessary for GuC to reset for D0 -> D3hot,
>> only enable/disable ctb communication.
>>
>> Modify the existing ct disable function to send a request
>> to disable ct communication if firmware is running.
>> Add a function to disable guc communication.
>>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_guc.c | 15 +++++++++++++++
>> drivers/gpu/drm/xe/xe_guc.h | 1 +
>> drivers/gpu/drm/xe/xe_guc_ct.c | 11 ++++++++++-
>> drivers/gpu/drm/xe/xe_guc_ct.h | 2 +-
>> 4 files changed, 27 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>> index 2493c5859948..3e4c00bee6bf 100644
>> --- a/drivers/gpu/drm/xe/xe_guc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc.c
>> @@ -557,6 +557,21 @@ int xe_guc_enable_communication(struct xe_guc *guc)
>> return 0;
>> }
>>
>> +int xe_guc_disable_communication(struct xe_guc *guc)
>> +{
>> + int err;
>> + struct xe_guc_ct *ct = &guc->ct;
>> +
>> + err = xe_guc_ct_disable(ct);
>> + if (err)
>> + return err;
>> +
>> + /* Check for messages received during/after the CT disable */
>> + guc_handle_mmio_msg(guc);
>> +
>> + return 0;
>> +}
>> +
>> int xe_guc_suspend(struct xe_guc *guc)
>> {
>> int ret;
>> diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
>> index 3addd8fc674a..18cf5d02eea7 100644
>> --- a/drivers/gpu/drm/xe/xe_guc.h
>> +++ b/drivers/gpu/drm/xe/xe_guc.h
>> @@ -18,6 +18,7 @@ int xe_guc_post_load_init(struct xe_guc *guc);
>> int xe_guc_reset(struct xe_guc *guc);
>> int xe_guc_upload(struct xe_guc *guc);
>> int xe_guc_min_load_for_hwconfig(struct xe_guc *guc);
>> +int xe_guc_disable_communication(struct xe_guc *guc);
>> int xe_guc_enable_communication(struct xe_guc *guc);
>> int xe_guc_suspend(struct xe_guc *guc);
>> void xe_guc_notify(struct xe_guc *guc);
>> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
>> index 59136b6a7c6f..64c2029b2752 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
>> @@ -21,6 +21,7 @@
>> #include "xe_map.h"
>> #include "xe_pm.h"
>> #include "xe_trace.h"
>> +#include "xe_uc_fw.h"
>>
>> /* Used when a CT send wants to block and / or receive data */
>> struct g2h_fence {
>> @@ -319,15 +320,23 @@ int xe_guc_ct_enable(struct xe_guc_ct *ct)
>> return err;
>> }
>>
>> -void xe_guc_ct_disable(struct xe_guc_ct *ct)
>> +int xe_guc_ct_disable(struct xe_guc_ct *ct)
>> {
>> + struct xe_guc *guc = ct_to_guc(ct);
>> + int ret = 0;
>> +
>> mutex_lock(&ct->lock); /* Serialise dequeue_one_g2h() */
>> spin_lock_irq(&ct->fast_lock); /* Serialise CT fast-path */
>> ct->enabled = false; /* Finally disable CT communication */
>> spin_unlock_irq(&ct->fast_lock);
>> mutex_unlock(&ct->lock);
>>
>> + if (xe_uc_fw_is_running(&guc->fw))
>> + ret = guc_ct_control_toggle(ct, false);
>
> ct->enabled holds incorrect status (false) if guc_ct_control_toggle()
> fails.
>
Will reorder this and send out a new rev
Thanks
Riana
> Regards,
> Bala
>> +
>> xa_destroy(&ct->fence_lookup);
>> +
>> + return ret;
>> }
>>
>> static bool h2g_has_room(struct xe_guc_ct *ct, u32 cmd_len)
>> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h
>> index f15f8a4857e0..1ad150c19ae3 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_ct.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_ct.h
>> @@ -12,7 +12,7 @@ struct drm_printer;
>>
>> int xe_guc_ct_init(struct xe_guc_ct *ct);
>> int xe_guc_ct_enable(struct xe_guc_ct *ct);
>> -void xe_guc_ct_disable(struct xe_guc_ct *ct);
>> +int xe_guc_ct_disable(struct xe_guc_ct *ct);
>> void xe_guc_ct_fast_path(struct xe_guc_ct *ct);
>>
>> struct xe_guc_ct_snapshot *
>> --
>> 2.40.0
>>
next prev parent reply other threads:[~2023-08-23 7:22 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 5:09 [Intel-xe] [PATCH 0/2] Remove GuC Reset in D3Hot path Riana Tauro
2023-08-23 5:09 ` [Intel-xe] [PATCH 1/2] RFC drm/xe: Disable ctb communication Riana Tauro
2023-08-23 6:32 ` Balasubramani Vivekanandan
2023-08-23 7:21 ` Riana Tauro [this message]
2023-08-31 19:08 ` Ceraolo Spurio, Daniele
2023-10-12 9:45 ` Michal Wajdeczko
2023-08-23 5:09 ` [Intel-xe] [PATCH 2/2] RFC drm/xe: Disable GuC CT communication for D3Hot Transition Riana Tauro
2023-08-23 6:37 ` Balasubramani Vivekanandan
2023-08-23 7:17 ` Riana Tauro
2023-08-31 19:02 ` Ceraolo Spurio, Daniele
2023-08-31 19:21 ` Rodrigo Vivi
2023-09-21 18:37 ` Rodrigo Vivi
2023-10-12 7:39 ` Riana Tauro
2023-10-12 9:48 ` Michal Wajdeczko
2023-08-23 5:20 ` [Intel-xe] ✓ CI.Patch_applied: success for Remove GuC Reset in D3Hot path Patchwork
2023-08-23 5:20 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-08-23 5:21 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-08-23 5:25 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-08-23 5:25 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-08-23 5:25 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-08-23 5:52 ` [Intel-xe] ✓ CI.BAT: success " Patchwork
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