From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
<intel-xe@lists.freedesktop.org>
Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>,
Mallesh Koujalagi <mallesh.koujalagi@intel.com>,
Alan Previn Teres Alexis <alan.previn.teres.alexis@intel.com>,
Julia Filipchuk <julia.filipchuk@intel.com>
Subject: Re: [PATCH 1/3] drm/xe/uc: Report DMA failure using SIGID
Date: Thu, 27 Aug 2026 13:21:25 +0200 [thread overview]
Message-ID: <1525b02b-1902-4fdf-aaa4-1562e7c66af2@intel.com> (raw)
In-Reply-To: <20260827002801.837731-1-daniele.ceraolospurio@intel.com>
On 8/27/2026 2:27 AM, Daniele Ceraolo Spurio wrote:
> Convert the uC DMA failure error to use the xe_log_err() helper.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
> Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> Cc: Alan Previn Teres Alexis <alan.previn.teres.alexis@intel.com>
> Cc: Julia Filipchuk <julia.filipchuk@intel.com>
> ---
> drivers/gpu/drm/xe/xe_uc_fw.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
> index e29878b255ba..02ed4f0eaf40 100644
> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
> @@ -18,6 +18,7 @@
> #include "xe_gt_sriov_vf.h"
> #include "xe_gt_types.h"
> #include "xe_guc.h"
> +#include "xe_log.h"
> #include "xe_map.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> @@ -914,6 +915,7 @@ static int uc_fw_xfer(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags)
> int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags)
> {
> struct xe_device *xe = uc_fw_to_xe(uc_fw);
> + struct xe_gt *gt = uc_fw_to_gt(uc_fw);
> int err;
btw, as this function is for GuC & HuC only, maybe we should add:
xe_gt_assert(gt, uc_fw->type == XE_UC_FW_TYPE_GUC ||
uc_fw->type == XE_UC_FW_TYPE_HUC);
>
> /* make sure the status was cleared the last time we reset the uc */
> @@ -931,9 +933,11 @@ int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags)
> return 0;
>
> fail:
> - drm_err(&xe->drm, "Failed to load %s firmware %s (%d)\n",
> - xe_uc_fw_type_repr(uc_fw->type), uc_fw->path,
> - err);
> + if (uc_fw->type == XE_UC_FW_TYPE_GUC)
> + xe_log_err(gt, GUC, err, "Failed to load firmware %s\n", uc_fw->path);
> + else if (uc_fw->type == XE_UC_FW_TYPE_HUC)
> + xe_log_err(gt, HUC, err, "Failed to load firmware %s\n", uc_fw->path);
so we could either replace above "else if" with "else"
or add at final "else" some 'not-possible' assert ?
> +
> xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOAD_FAIL);
> return err;
> }
with asserts added,
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
prev parent reply other threads:[~2026-08-27 11:21 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-27 0:27 [PATCH 1/3] drm/xe/uc: Report DMA failure using SIGID Daniele Ceraolo Spurio
2026-08-27 0:28 ` [PATCH 2/3] drm/xe/guc: Report major GuC failures " Daniele Ceraolo Spurio
2026-08-27 11:47 ` Michal Wajdeczko
2026-08-27 0:28 ` [PATCH 3/3] drm/xe/guc: Report errors that cause a CT shutdown " Daniele Ceraolo Spurio
2026-08-27 14:34 ` Michal Wajdeczko
2026-08-27 21:33 ` Daniele Ceraolo Spurio
2026-08-27 22:41 ` Michal Wajdeczko
2026-08-27 0:36 ` ✓ CI.KUnit: success for series starting with [1/3] drm/xe/uc: Report DMA failure " Patchwork
2026-08-27 1:35 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-27 2:39 ` ✓ Xe.CI.FULL: " Patchwork
2026-08-27 11:21 ` Michal Wajdeczko [this message]
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