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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from PH8PR11MB8287.namprd11.prod.outlook.com (2603:10b6:510:1c7::14) by MN0PR11MB6208.namprd11.prod.outlook.com (2603:10b6:208:3c4::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9137.17; Mon, 22 Sep 2025 18:24:07 +0000 Received: from PH8PR11MB8287.namprd11.prod.outlook.com ([fe80::7e8b:2e5:8ce4:2350]) by PH8PR11MB8287.namprd11.prod.outlook.com ([fe80::7e8b:2e5:8ce4:2350%7]) with mapi id 15.20.9137.017; Mon, 22 Sep 2025 18:24:07 +0000 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable In-Reply-To: <20250918211319.603324-6-matthew.d.roper@intel.com> References: <20250918211319.603324-4-matthew.d.roper@intel.com> <20250918211319.603324-6-matthew.d.roper@intel.com> Subject: Re: [PATCH 2/2] drm/xe/configfs: Add attribute to disable GT types From: Gustavo Sousa CC: To: Matt Roper , Date: Mon, 22 Sep 2025 15:24:03 -0300 Message-ID: <175856544316.2439.1266660399029330345@intel.com> User-Agent: alot/0.12.dev22+g972188619 X-ClientProxiedBy: BY1P220CA0013.NAMP220.PROD.OUTLOOK.COM (2603:10b6:a03:59d::17) To PH8PR11MB8287.namprd11.prod.outlook.com (2603:10b6:510:1c7::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8287:EE_|MN0PR11MB6208:EE_ X-MS-Office365-Filtering-Correlation-Id: cff0e19f-cff9-4b2f-8fc7-08ddfa0537c9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024; 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Add a configfs >attribute to allow this kind of control for debugging. > >With today's platforms and software design, this configuration setting >is only effective for disabling the media GT since the driver currently >requires that there always be a primary GT to probe the device. However >this might change in the future --- in theory it should be possible >(with some additional driver work) to allow an igpu device to come up >with only the media GT and no primary GT. Or to allow an igpu device to >come up with no GTs at all (for display-only usage). A primary GT will >likely always be required on dgpu platforms because we rely on the BCS >engines inside the primary GT for various vram operations. > >Signed-off-by: Matt Roper >--- > drivers/gpu/drm/xe/xe_configfs.c | 119 +++++++++++++++++++++++++++++++ > drivers/gpu/drm/xe/xe_configfs.h | 2 + > drivers/gpu/drm/xe/xe_pci.c | 18 +++++ > 3 files changed, 139 insertions(+) > >diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_conf= igfs.c >index e52808e3199f..c675994439d4 100644 >--- a/drivers/gpu/drm/xe/xe_configfs.c >+++ b/drivers/gpu/drm/xe/xe_configfs.c >@@ -13,6 +13,7 @@ > #include >=20 > #include "xe_configfs.h" >+#include "xe_gt_types.h" > #include "xe_hw_engine_types.h" > #include "xe_module.h" > #include "xe_pci_types.h" >@@ -54,6 +55,7 @@ > * : > * =E2=94=94=E2=94=80=E2=94=80 0000:03:00.0 > * =E2=94=9C=E2=94=80=E2=94=80 survivability_mode >+ * =E2=94=9C=E2=94=80=E2=94=80 gt_types_allowed > * =E2=94=9C=E2=94=80=E2=94=80 engines_allowed > * =E2=94=94=E2=94=80=E2=94=80 enable_psmi > * >@@ -77,6 +79,40 @@ > * > * This attribute can only be set before binding to the device. > * >+ * Allowed GT types: >+ * ----------------- >+ * >+ * Allow only specific types of GTs to be detected and initialized by the >+ * driver. Any combination of GT types can be enabled/disabled, although >+ * some settings will cause the device to fail to probe. I think it would be nice to have a short description of input/output formats. Something like: Writes support both comma- and newline-separated input format. Reads will always return one GT type per line. The supported GT types are primary and media. >+ * >+ * Examples: >+ * >+ * Allow both primary and media GTs to be initialized and used. This mat= ches >+ * the driver's default behavior:: >+ * >+ * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_= types_allowed >+ * >+ * Allow only the primary GT of each tile to be initialized and used, >+ * effectively disabling the media GT if it exists on the platform:: >+ * >+ * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_= allowed >+ * >+ * Allow only the media GT of each tile to be initialized and used, >+ * effectively disabling the primary GT. **This configuration will cause >+ * device probe failure on all current platforms, but may be allowed on >+ * igpu platforms in the future**:: >+ * >+ * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_al= lowed >+ * >+ * Disable all GTs. Only other GPU IP (such as display) is potentially u= sable. >+ * **This configuration will cause device probe failure on all current >+ * platforms, but may be allowed on igpu platforms in the future**:: >+ * >+ * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed >+ * >+ * This attribute can only be set before binding to the device. I think this line could appear before the examples. >+ * > * Allowed engines: > * ---------------- > * >@@ -127,6 +163,7 @@ struct xe_config_group_device { > struct config_group group; >=20 > struct xe_config_device { >+ u64 gt_types_allowed; > u64 engines_allowed; > bool survivability_mode; > bool enable_psmi; >@@ -139,6 +176,7 @@ struct xe_config_group_device { > }; >=20 > static const struct xe_config_device device_defaults =3D { >+ .gt_types_allowed =3D U64_MAX, > .engines_allowed =3D U64_MAX, > .survivability_mode =3D false, > .enable_psmi =3D false, >@@ -157,6 +195,7 @@ struct engine_info { > /* Some helpful macros to aid on the sizing of buffer allocation when par= sing */ > #define MAX_ENGINE_CLASS_CHARS 5 > #define MAX_ENGINE_INSTANCE_CHARS 2 >+#define MAX_GT_TYPE_CHARS 7 >=20 > static const struct engine_info engine_info[] =3D { > { .cls =3D "rcs", .mask =3D XE_HW_ENGINE_RCS_MASK }, >@@ -167,6 +206,14 @@ static const struct engine_info engine_info[] =3D { > { .cls =3D "gsccs", .mask =3D XE_HW_ENGINE_GSCCS_MASK }, > }; >=20 >+static const struct { >+ const char *name; I wonder if it would be good to use name[MAX_GT_TYPE_CHARS + 1] here. That way we get warnings if the strings don't match the expectation. >+ u64 type; Hm... I would have gone with the enum type here. Any specific reason we chose u64 here? >+} gt_types[] =3D { >+ { .name =3D "primary", .type =3D XE_GT_TYPE_MAIN }, >+ { .name =3D "media", .type =3D XE_GT_TYPE_MEDIA }, >+}; >+ > static struct xe_config_group_device *to_xe_config_group_device(struct co= nfig_item *item) > { > return container_of(to_config_group(item), struct xe_config_group= _device, group); >@@ -229,6 +276,55 @@ static ssize_t survivability_mode_store(struct config= _item *item, const char *pa > return len; > } >=20 >+static ssize_t gt_types_allowed_show(struct config_item *item, char *page= ) >+{ >+ struct xe_config_device *dev =3D to_xe_config_device(item); >+ char *p =3D page; >+ >+ for (size_t i =3D 0; i < ARRAY_SIZE(gt_types); i++) >+ if (dev->gt_types_allowed & BIT_ULL(gt_types[i].type)) >+ p +=3D sprintf(p, "%s\n", gt_types[i].name); >+ >+ return p - page; >+} >+ >+static ssize_t gt_types_allowed_store(struct config_item *item, const cha= r *page, >+ size_t len) >+{ >+ struct xe_config_group_device *dev =3D to_xe_config_group_device(= item); >+ const char *p =3D page; >+ u64 typemask =3D 0; >+ >+ while (p < page + len) { >+ size_t typelen =3D strcspn(p, ",\n"); >+ bool matched =3D false; >+ >+ if (typelen > MAX_GT_TYPE_CHARS) >+ return -EINVAL; >+ >+ for (size_t i =3D 0; i < ARRAY_SIZE(gt_types); i++) { >+ if (strncmp(p, gt_types[i].name, typelen) =3D=3D = 0) { I think we are allowing values like "pri", "me" etc in p to match gt_types[i].name here. Is that intentional? >+ typemask |=3D BIT(gt_types[i].type); >+ matched =3D true; >+ break; >+ } >+ } >+ >+ if (!matched) >+ return -EINVAL; >+ >+ p +=3D typelen + 1; >+ } >+ >+ guard(mutex)(&dev->lock); >+ if (is_bound(dev)) >+ return -EBUSY; >+ >+ dev->config.gt_types_allowed =3D typemask; >+ >+ return len; >+} >+ > static ssize_t engines_allowed_show(struct config_item *item, char *page) > { > struct xe_config_device *dev =3D to_xe_config_device(item); >@@ -342,11 +438,13 @@ static ssize_t enable_psmi_store(struct config_item = *item, const char *page, siz > } >=20 > CONFIGFS_ATTR(, enable_psmi); >+CONFIGFS_ATTR(, gt_types_allowed); > CONFIGFS_ATTR(, engines_allowed); > CONFIGFS_ATTR(, survivability_mode); >=20 > static struct configfs_attribute *xe_config_device_attrs[] =3D { > &attr_enable_psmi, >+ &attr_gt_types_allowed, > &attr_engines_allowed, > &attr_survivability_mode, > NULL, >@@ -513,6 +611,7 @@ static void dump_custom_dev_config(struct pci_dev *pde= v, > dev->config.attr_); \ > } while (0) >=20 >+ PRI_CUSTOM_ATTR("%llx", gt_types_allowed); > PRI_CUSTOM_ATTR("%llx", engines_allowed); > PRI_CUSTOM_ATTR("%d", enable_psmi); > PRI_CUSTOM_ATTR("%d", survivability_mode); >@@ -563,6 +662,26 @@ bool xe_configfs_get_survivability_mode(struct pci_de= v *pdev) > return mode; > } >=20 >+/** >+ * xe_configfs_get_gt_types_allowed - get GT type allowed mask from confi= gfs >+ * @pdev: pci device >+ * >+ * Return: GT type mask set in configfs >+ */ >+u64 xe_configfs_get_gt_types_allowed(struct pci_dev *pdev) >+{ >+ struct xe_config_group_device *dev =3D find_xe_config_group_devic= e(pdev); >+ u64 mask; >+ >+ if (!dev) >+ return device_defaults.gt_types_allowed; >+ >+ mask =3D dev->config.gt_types_allowed; >+ config_group_put(&dev->group); >+ >+ return mask; >+} >+ > /** > * xe_configfs_get_engines_allowed - get engine allowed mask from configf= s > * @pdev: pci device >diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_conf= igfs.h >index 1402e863b71c..eddb66201edf 100644 >--- a/drivers/gpu/drm/xe/xe_configfs.h >+++ b/drivers/gpu/drm/xe/xe_configfs.h >@@ -15,6 +15,7 @@ int xe_configfs_init(void); > void xe_configfs_exit(void); > void xe_configfs_check_device(struct pci_dev *pdev); > bool xe_configfs_get_survivability_mode(struct pci_dev *pdev); >+u64 xe_configfs_get_gt_types_allowed(struct pci_dev *pdev); > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev); > bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev); > #else >@@ -22,6 +23,7 @@ static inline int xe_configfs_init(void) { return 0; } > static inline void xe_configfs_exit(void) { } > static inline void xe_configfs_check_device(struct pci_dev *pdev) { } > static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pde= v) { return false; } >+static inline u64 xe_configfs_get_gt_types_allowed(struct pci_dev *pdev) = { return U64_MAX; } > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) {= return U64_MAX; } > static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { r= eturn false; } > #endif >diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c >index 77bee811a150..f065b8ea5673 100644 >--- a/drivers/gpu/drm/xe/xe_pci.c >+++ b/drivers/gpu/drm/xe/xe_pci.c >@@ -668,8 +668,21 @@ static int xe_info_init(struct xe_device *xe, > const struct xe_media_desc *media_desc; > struct xe_tile *tile; > struct xe_gt *gt; >+ u64 gt_types_allowed; > u8 id; >=20 >+ /* >+ * It's not currently possible to probe a device with the primary >+ * GT disabled. With some work, this may be future in the possib= le >+ * for igpu platforms (although probably not for dgpu's since acc= ess >+ * to the primary GT's BCS engines is required for VRAM managemen= t). >+ */ >+ gt_types_allowed =3D xe_configfs_get_gt_types_allowed(to_pci_dev(= xe->drm.dev)); >+ if ((gt_types_allowed & BIT_ULL(XE_GT_TYPE_MAIN)) =3D=3D 0) { >+ drm_err(&xe->drm, "Cannot probe device with primary GT di= sabled via configfs\n"); >+ return -ENODEV; >+ } >+ > /* > * If this platform supports GMD_ID, we'll detect the proper IP > * descriptor to use from hardware registers. >@@ -761,6 +774,11 @@ static int xe_info_init(struct xe_device *xe, > if (MEDIA_VER(xe) < 13 || !media_desc) > continue; >=20 >+ if ((gt_types_allowed & BIT_ULL(XE_GT_TYPE_MEDIA)) =3D=3D= 0) { >+ drm_info(&xe->drm, "Media GT disabled via configf= s\n"); >+ continue; >+ } >+ Shouldn't we do this before updating gt->info.engine_mask (where gt is the primary GT)? -- Gustavo Sousa > /* > * Allocate and setup media GT for platforms with standal= one > * media. >--=20 >2.51.0 >