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From: Nirmoy Das <nirmoy.das@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
	Nirmoy Das <nirmoy.das@intel.com>,
	intel-xe@lists.freedesktop.org
Cc: Badal Nilawar <badal.nilawar@intel.com>,
	Matthew Auld <matthew.auld@intel.com>,
	John Harrison <John.C.Harrison@Intel.com>,
	Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	Matthew Brost <matthew.brost@intel.com>
Subject: Re: [PATCH] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout
Date: Thu, 24 Oct 2024 11:46:17 +0200	[thread overview]
Message-ID: <17604660-d5d6-4d95-b260-dd440f498ef0@linux.intel.com> (raw)
In-Reply-To: <87wmhxsupa.fsf@intel.com>


On 10/24/2024 11:42 AM, Jani Nikula wrote:
> On Wed, 23 Oct 2024, Nirmoy Das <nirmoy.das@intel.com> wrote:
>> Flush xe ordered_wq in case of ufence timeout which is observed
>> on LNL and that points recent scheduling issue with E-cores.
>>
>> This is similar to the recent fix:
>> commit e51527233804 ("drm/xe/guc/ct: Flush g2h worker in case of g2h
>> response timeout") and should be removed once there is E core
>> scheduling fix.
>>
>> Cc: Badal Nilawar <badal.nilawar@intel.com>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2754
>> Suggested-by: Matthew Brost <matthew.brost@intel.com>
>> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_wait_user_fence.c | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
>> index f5deb81eba01..7f034871345b 100644
>> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
>> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
>> @@ -155,6 +155,17 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
>>  		}
>>  
>>  		if (!timeout) {
>> +			/*
>> +			 * This is analogous to e51527233804 ("drm/xe/guc/ct: Flush g2h worker
>> +			 * in case of g2h response timeout")
>> +			 *
>> +			 * TODO: Drop this change once workqueue scheduling delay issue is
>> +			 * fixed on LNL Hybrid CPU.
>> +			 */
>> +			__flush_workqueue(xe->ordered_wq);
> Just flush_workqueue() please, not the double underscored version. The
> double underscores are there to tell you not to use it...


I will update that. Thanks for catching it.


Nirmoy

>
> BR,
> Jani.
>
>> +			err = do_compare(addr, args->value, args->mask, args->op);
>> +			if (err <= 0)
>> +				break;
>>  			err = -ETIME;
>>  			break;
>>  		}

  reply	other threads:[~2024-10-24  9:46 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-23 15:58 [PATCH] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout Nirmoy Das
2024-10-23 22:39 ` Matthew Brost
2024-10-24  9:08   ` Nirmoy Das
2024-10-24  2:05 ` Ghimiray, Himal Prasad
2024-10-24  9:18   ` Nirmoy Das
2024-10-24  9:08 ` ✓ CI.Patch_applied: success for " Patchwork
2024-10-24  9:09 ` ✓ CI.checkpatch: " Patchwork
2024-10-24  9:10 ` ✓ CI.KUnit: " Patchwork
2024-10-24  9:21 ` ✓ CI.Build: " Patchwork
2024-10-24  9:24 ` ✓ CI.Hooks: " Patchwork
2024-10-24  9:25 ` ✓ CI.checksparse: " Patchwork
2024-10-24  9:42 ` [PATCH] " Jani Nikula
2024-10-24  9:46   ` Nirmoy Das [this message]
2024-10-24 20:51 ` ✓ CI.FULL: success for " Patchwork

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