Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>,
	<intel-gfx@lists.freedesktop.org>,
	<intel-xe@lists.freedesktop.org>
Cc: <ankit.k.nautiyal@intel.com>, <mika.kahola@intel.com>,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: Re: [PATCH 3/3] drm/i915/cx0: Clear response ready & error bit
Date: Tue, 30 Dec 2025 14:36:35 -0300	[thread overview]
Message-ID: <176711619593.18661.17406989812251209808@intel.com> (raw)
In-Reply-To: <20251230083142.70064-4-suraj.kandpal@intel.com>

Quoting Suraj Kandpal (2025-12-30 05:31:42-03:00)
>Clear the response ready and error bit of PORT_P2M_MESSAGE_BUS_STATUS
>before writing the transaction pending bit of
>PORT_M2P_MSGBUS_CTL as that is a hard requirement. If not done
>we find that the PHY hangs since it ends up in a weird state if left
>idle for more than 1 hour.

Since the series title refers to suspend/resume, is there an easy way of
reproducing this via some power state transition?

I'm wondering if we are looking at a driver issue here or if this is
really something else.  I see that we usually call intel_cx0_bus_reset()
in error paths, which contains a call to
intel_clear_response_ready_flag(), but it could end up being not called
if the reset times out.

Do we see error messages from the driver when the PHY hangs?

--
Gustavo Sousa

>
>Bspec: 65101
>Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>index 5edd293b533b..5ebc3404eee2 100644
>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>@@ -222,6 +222,8 @@ static int __intel_cx0_read_once(struct intel_encoder *encoder,
>                 return -ETIMEDOUT;
>         }
> 
>+        intel_clear_response_ready_flag(encoder, lane);
>+
>         intel_de_write(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane),
>                        XELPDP_PORT_M2P_TRANSACTION_PENDING |
>                        XELPDP_PORT_M2P_COMMAND_READ |
>@@ -293,6 +295,8 @@ static int __intel_cx0_write_once(struct intel_encoder *encoder,
>                 return -ETIMEDOUT;
>         }
> 
>+        intel_clear_response_ready_flag(encoder, lane);
>+
>         intel_de_write(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane),
>                        XELPDP_PORT_M2P_TRANSACTION_PENDING |
>                        (committed ? XELPDP_PORT_M2P_COMMAND_WRITE_COMMITTED :
>-- 
>2.34.1
>

  parent reply	other threads:[~2025-12-30 17:36 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-30  8:31 [PATCH 0/3] Fix Cx0 Suspend Resume issue Suraj Kandpal
2025-12-30  8:31 ` [PATCH 1/3] drm/i915/cx0: Split PLL enabling/disabling in two parts Suraj Kandpal
2025-12-30 15:20   ` Gustavo Sousa
2025-12-31  5:07     ` Kandpal, Suraj
2026-01-05 14:13       ` Gustavo Sousa
2026-01-06  6:19         ` Kandpal, Suraj
2026-01-08  8:51         ` Kahola, Mika
2025-12-30 21:23   ` kernel test robot
2026-01-07 15:22   ` Michał Grzelak
2025-12-30  8:31 ` [PATCH 2/3] drm/i915/cx0: Move step 12 to enable clock hook Suraj Kandpal
2025-12-30 15:22   ` Gustavo Sousa
2025-12-31  5:10     ` Kandpal, Suraj
2026-01-05 14:37       ` Gustavo Sousa
2026-01-06  6:18         ` Kandpal, Suraj
2025-12-30  8:31 ` [PATCH 3/3] drm/i915/cx0: Clear response ready & error bit Suraj Kandpal
2025-12-30 15:29   ` Jani Nikula
2025-12-30 17:36   ` Gustavo Sousa [this message]
2025-12-31  4:59     ` Kandpal, Suraj
2026-01-05 15:14       ` Gustavo Sousa
2026-01-06  6:21         ` Kandpal, Suraj
2025-12-30  8:38 ` ✓ CI.KUnit: success for Fix Cx0 Suspend Resume issue Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=176711619593.18661.17406989812251209808@intel.com \
    --to=gustavo.sousa@intel.com \
    --cc=ankit.k.nautiyal@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=mika.kahola@intel.com \
    --cc=suraj.kandpal@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox