Re: [PATCH v3 05/13] drm/i915/dmc: Add interface to block PKG C-state

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Tue, 2025-04-22 at 08:28 +0000, Kahola, Mika wrote:
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf
> > Of Jouni
> > Högander
> > Sent: Monday, 14 April 2025 13.05
> > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> > Cc: Hogander, Jouni <jouni.hogander@intel.com>
> > Subject: [PATCH v3 05/13] drm/i915/dmc: Add interface to block PKG
> > C-state
> > 
> > Add interface to block PKG C-state. This is needed to implement
> > workaround for
> > underrun on idle PSR HW issue (Wa_16025596647).
> > 
> > Bspec: 74151
> 
> Reviewed-by: Mika Kahola <mika.kahola@intel.com>

Thank you Mika for reviewing this patch set. It is now pushed as a
whole to drm-intel-next.

BR,

Jouni Högander

> 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dmc.c | 17 +++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_dmc.h |  2 ++
> >  2 files changed, 19 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> > b/drivers/gpu/drm/i915/display/intel_dmc.c
> > index 98f80a6c63e8..c65544e48c42 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > @@ -517,6 +517,23 @@ void intel_dmc_disable_pipe(struct
> > intel_display
> > *display, enum pipe pipe)
> >  		intel_de_rmw(display, PIPEDMC_CONTROL(pipe),
> > PIPEDMC_ENABLE, 0);  }
> > 
> > +/**
> > + * intel_dmc_block_pkgc() - block PKG C-state
> > + * @display: display instance
> > + * @pipe: pipe which register use to block
> > + * @block: block/unblock
> > + *
> > + * This interface is target for Wa_16025596647 usage. I.e. to
> > set/clear
> > + * PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS bit in
> > PIPEDMC_BLOCK_PKGC_SW register.
> > + */
> > +void intel_dmc_block_pkgc(struct intel_display *display, enum pipe
> > pipe,
> > +			  bool block)
> > +{
> > +	intel_de_rmw(display, PIPEDMC_BLOCK_PKGC_SW(pipe),
> > +		     PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS,
> > block ?
> > +		     PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS : 0);
> > }
> > +
> >  static bool is_dmc_evt_ctl_reg(struct intel_display *display,
> >  			       enum intel_dmc_id dmc_id,
> > i915_reg_t reg)  { diff --
> > git a/drivers/gpu/drm/i915/display/intel_dmc.h
> > b/drivers/gpu/drm/i915/display/intel_dmc.h
> > index c78426eb4cd5..236312fb791c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.h
> > @@ -18,6 +18,8 @@ void intel_dmc_load_program(struct intel_display
> > *display);
> > void intel_dmc_disable_program(struct intel_display *display); 
> > void
> > intel_dmc_enable_pipe(struct intel_display *display, enum pipe
> > pipe);  void
> > intel_dmc_disable_pipe(struct intel_display *display, enum pipe
> > pipe);
> > +void intel_dmc_block_pkgc(struct intel_display *display, enum pipe
> > pipe,
> > +			  bool block);
> >  void intel_dmc_fini(struct intel_display *display);  void
> > intel_dmc_suspend(struct
> > intel_display *display);  void intel_dmc_resume(struct
> > intel_display *display);
> > --
> > 2.43.0
>