From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-xe] [PATCH v2 03/14] drm/xe: prefer xe_bo_create_pin_map()
Date: Tue, 28 Feb 2023 10:41:26 +0000 [thread overview]
Message-ID: <20230228104137.80965-4-matthew.auld@intel.com> (raw)
In-Reply-To: <20230228104137.80965-1-matthew.auld@intel.com>
With small-bar we likely want to annotate all the kernel users that
require CPU access with vram. If xe_bo_create_pin_map() is the central
place for that then we should have a central place to annotate.
This also simplifies the code and fixes what appears to be a double
xe_bo_put(hwe->hwsp) in the error handling.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/xe/xe_hw_engine.c | 23 +++-----------
drivers/gpu/drm/xe/xe_lrc.c | 53 +++++++++++--------------------
drivers/gpu/drm/xe/xe_lrc_types.h | 1 -
3 files changed, 22 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index ae541b5e50f3..b035e2fa6744 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -310,24 +310,14 @@ static int hw_engine_init(struct xe_gt *gt, struct xe_hw_engine *hwe,
xe_reg_sr_apply_mmio(&hwe->reg_sr, gt);
xe_reg_sr_apply_whitelist(&hwe->reg_whitelist, hwe->mmio_base, gt);
- hwe->hwsp = xe_bo_create_locked(xe, gt, NULL, SZ_4K, ttm_bo_type_kernel,
- XE_BO_CREATE_VRAM_IF_DGFX(gt) |
- XE_BO_CREATE_GGTT_BIT);
+ hwe->hwsp = xe_bo_create_pin_map(xe, gt, NULL, SZ_4K, ttm_bo_type_kernel,
+ XE_BO_CREATE_VRAM_IF_DGFX(gt) |
+ XE_BO_CREATE_GGTT_BIT);
if (IS_ERR(hwe->hwsp)) {
err = PTR_ERR(hwe->hwsp);
goto err_name;
}
- err = xe_bo_pin(hwe->hwsp);
- if (err)
- goto err_unlock_put_hwsp;
-
- err = xe_bo_vmap(hwe->hwsp);
- if (err)
- goto err_unpin_hwsp;
-
- xe_bo_unlock_no_vm(hwe->hwsp);
-
err = xe_lrc_init(&hwe->kernel_lrc, hwe, NULL, NULL, SZ_16K);
if (err)
goto err_hwsp;
@@ -353,15 +343,10 @@ static int hw_engine_init(struct xe_gt *gt, struct xe_hw_engine *hwe,
return 0;
-err_unpin_hwsp:
- xe_bo_unpin(hwe->hwsp);
-err_unlock_put_hwsp:
- xe_bo_unlock_no_vm(hwe->hwsp);
- xe_bo_put(hwe->hwsp);
err_kernel_lrc:
xe_lrc_finish(&hwe->kernel_lrc);
err_hwsp:
- xe_bo_put(hwe->hwsp);
+ xe_bo_unpin_map_no_vm(hwe->hwsp);
err_name:
hwe->name = NULL;
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index af4518a82db2..9140b057a5ba 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -615,7 +615,11 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
lrc->flags = 0;
- lrc->bo = xe_bo_create_locked(xe, hwe->gt, vm,
+ /*
+ * FIXME: Perma-pinning LRC as we don't yet support moving GGTT address
+ * via VM bind calls.
+ */
+ lrc->bo = xe_bo_create_pin_map(xe, hwe->gt, vm,
ring_size + xe_lrc_size(xe, hwe->class),
ttm_bo_type_kernel,
XE_BO_CREATE_VRAM_IF_DGFX(hwe->gt) |
@@ -628,21 +632,6 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
else
lrc->full_gt = hwe->gt;
- /*
- * FIXME: Perma-pinning LRC as we don't yet support moving GGTT address
- * via VM bind calls.
- */
- err = xe_bo_pin(lrc->bo);
- if (err)
- goto err_unlock_put_bo;
- lrc->flags |= XE_LRC_PINNED;
-
- err = xe_bo_vmap(lrc->bo);
- if (err)
- goto err_unpin_bo;
-
- xe_bo_unlock_vm_held(lrc->bo);
-
lrc->ring.size = ring_size;
lrc->ring.tail = 0;
@@ -652,8 +641,8 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
if (!gt->default_lrc[hwe->class]) {
init_data = empty_lrc_data(hwe);
if (!init_data) {
- xe_lrc_finish(lrc);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto err_lrc_finish;
}
}
@@ -710,12 +699,8 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
return 0;
-err_unpin_bo:
- if (lrc->flags & XE_LRC_PINNED)
- xe_bo_unpin(lrc->bo);
-err_unlock_put_bo:
- xe_bo_unlock_vm_held(lrc->bo);
- xe_bo_put(lrc->bo);
+err_lrc_finish:
+ xe_lrc_finish(lrc);
return err;
}
@@ -724,17 +709,15 @@ void xe_lrc_finish(struct xe_lrc *lrc)
struct ww_acquire_ctx ww;
xe_hw_fence_ctx_finish(&lrc->fence_ctx);
- if (lrc->flags & XE_LRC_PINNED) {
- if (lrc->bo->vm)
- xe_vm_lock(lrc->bo->vm, &ww, 0, false);
- else
- xe_bo_lock_no_vm(lrc->bo, NULL);
- xe_bo_unpin(lrc->bo);
- if (lrc->bo->vm)
- xe_vm_unlock(lrc->bo->vm, &ww);
- else
- xe_bo_unlock_no_vm(lrc->bo);
- }
+ if (lrc->bo->vm)
+ xe_vm_lock(lrc->bo->vm, &ww, 0, false);
+ else
+ xe_bo_lock_no_vm(lrc->bo, NULL);
+ xe_bo_unpin(lrc->bo);
+ if (lrc->bo->vm)
+ xe_vm_unlock(lrc->bo->vm, &ww);
+ else
+ xe_bo_unlock_no_vm(lrc->bo);
xe_bo_put(lrc->bo);
}
diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
index 2827efa2091d..8fe08535873d 100644
--- a/drivers/gpu/drm/xe/xe_lrc_types.h
+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
@@ -25,7 +25,6 @@ struct xe_lrc {
/** @flags: LRC flags */
u32 flags;
-#define XE_LRC_PINNED BIT(1)
/** @ring: submission ring state */
struct {
--
2.39.2
next prev parent reply other threads:[~2023-02-28 10:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-28 10:41 [Intel-xe] [PATCH v2 00/14] small-bar support Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 01/14] drm/xe/display: fix IS_ALDERLAKE_P() Matthew Auld
2023-02-28 14:09 ` Maarten Lankhorst
2023-02-28 17:57 ` Matt Roper
2023-02-28 18:54 ` Lucas De Marchi
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 02/14] drm/xe/display: fix bo leak when unloading module Matthew Auld
2023-02-28 10:41 ` Matthew Auld [this message]
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 04/14] drm/xe/bo: explicitly reject zero sized BO Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 05/14] drm/xe/mmio: s/lmem/vram/ Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 06/14] drm/xe/vram: start tracking the io_size Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 07/14] drm/xe/buddy: remove the virtualized start Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 08/14] drm/xe/buddy: add visible tracking Matthew Auld
2023-02-28 14:24 ` Maarten Lankhorst
2023-02-28 15:05 ` Matthew Auld
2023-02-28 20:26 ` Maarten Lankhorst
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 09/14] drm/xe/buddy: add compatible and intersects hooks Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 10/14] drm/xe/bo: support tiered vram allocation for small-bar Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 11/14] drm/xe/migrate: retain CCS aux state for vram -> vram Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 12/14] drm/xe/display: annotate CC buffers with NEEDS_CPU_ACCESS Matthew Auld
2023-02-28 14:48 ` Maarten Lankhorst
2023-02-28 15:20 ` Matthew Auld
2023-03-02 11:51 ` Maarten Lankhorst
2023-03-03 12:12 ` Matthew Auld
2023-03-03 12:58 ` Maarten Lankhorst
2023-02-28 15:22 ` Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 13/14] drm/xe/uapi: add the userspace bits for small-bar Matthew Auld
2023-02-28 10:41 ` [Intel-xe] [PATCH v2 14/14] drm/xe: fully turn on small-bar support Matthew Auld
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