From: Matthew Brost <matthew.brost@intel.com>
To: <intel-xe@lists.freedesktop.org>
Subject: [Intel-xe] [PATCH v5 6/8] drm/xe: Avoid doing rebinds
Date: Mon, 3 Apr 2023 18:42:26 -0700 [thread overview]
Message-ID: <20230404014228.3738347-7-matthew.brost@intel.com> (raw)
In-Reply-To: <20230404014228.3738347-1-matthew.brost@intel.com>
If we dont change page sizes we can avoid doing rebinds rather just do a
partial unbind. The algorithm to determine is page size is greedy as we
assume all pages in the removed VMA are the largest page used in the
VMA.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_pt.c | 4 ++
drivers/gpu/drm/xe/xe_vm.c | 69 +++++++++++++++++++++++++-------
drivers/gpu/drm/xe/xe_vm_types.h | 17 ++++----
3 files changed, 65 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 4da248484267..43e5a1054411 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -412,6 +412,8 @@ struct xe_pt_stage_bind_walk {
/* Input parameters for the walk */
/** @vm: The vm we're building for. */
struct xe_vm *vm;
+ /** @vma: The vma we are binding for. */
+ struct xe_vma *vma;
/** @gt: The gt we're building for. */
struct xe_gt *gt;
/** @cache: Desired cache level for the ptes */
@@ -688,6 +690,7 @@ xe_pt_stage_bind_entry(struct drm_pt *parent, pgoff_t offset,
if (!null)
xe_res_next(curs, next - addr);
xe_walk->va_curs_start = next;
+ xe_walk->vma->gpuva.flags |= (XE_VMA_PTE_4K << level);
*action = ACTION_CONTINUE;
return ret;
@@ -776,6 +779,7 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
.max_level = XE_PT_HIGHEST_LEVEL,
},
.vm = xe_vma_vm(vma),
+ .vma = vma,
.gt = gt,
.curs = &curs,
.va_curs_start = xe_vma_start(vma),
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 5d74a8aa9e8d..c1e1b443cd2d 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2273,6 +2273,16 @@ static struct xe_vma *new_vma(struct xe_vm *vm, struct drm_gpuva_op_map *op,
return vma;
}
+static u64 xe_vma_max_pte_size(struct xe_vma *vma)
+{
+ if (vma->gpuva.flags & XE_VMA_PTE_1G)
+ return SZ_1G;
+ else if (vma->gpuva.flags & XE_VMA_PTE_2M)
+ return SZ_2M;
+
+ return SZ_4K;
+}
+
/*
* Parse operations list and create any resources needed for the operations
* prior to fully commiting to the operations. This setp can fail.
@@ -2349,6 +2359,13 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct xe_engine *e,
break;
}
case DRM_GPUVA_OP_REMAP:
+ {
+ struct xe_vma *old =
+ gpuva_to_vma(op->base.remap.unmap->va);
+
+ op->remap.start = xe_vma_start(old);
+ op->remap.range = xe_vma_size(old);
+
if (op->base.remap.prev) {
struct xe_vma *vma;
bool read_only =
@@ -2367,6 +2384,20 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct xe_engine *e,
}
op->remap.prev = vma;
+
+ /*
+ * XXX: Not sure why userptr doesn't
+ * work but really shouldn't be a use
+ * case.
+ */
+ op->remap.skip_prev = !xe_vma_is_userptr(old) &&
+ IS_ALIGNED(xe_vma_end(vma), xe_vma_max_pte_size(old));
+ if (op->remap.skip_prev) {
+ op->remap.range -=
+ xe_vma_end(vma) -
+ xe_vma_start(old);
+ op->remap.start = xe_vma_end(vma);
+ }
}
if (op->base.remap.next) {
@@ -2388,20 +2419,16 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct xe_engine *e,
}
op->remap.next = vma;
+ op->remap.skip_next = !xe_vma_is_userptr(old) &&
+ IS_ALIGNED(xe_vma_start(vma), xe_vma_max_pte_size(old));
+ if (op->remap.skip_next)
+ op->remap.range -=
+ xe_vma_end(old) -
+ xe_vma_start(vma);
}
-
- /* XXX: Support no doing remaps */
- op->remap.start =
- xe_vma_start(gpuva_to_vma(op->base.remap.unmap->va));
- op->remap.range =
- xe_vma_size(gpuva_to_vma(op->base.remap.unmap->va));
break;
+ }
case DRM_GPUVA_OP_UNMAP:
- op->unmap.start =
- xe_vma_start(gpuva_to_vma(op->base.unmap.va));
- op->unmap.range =
- xe_vma_size(gpuva_to_vma(op->base.unmap.va));
- break;
case DRM_GPUVA_OP_PREFETCH:
/* Nothing to do */
break;
@@ -2440,10 +2467,21 @@ static void xe_vma_op_commit(struct xe_vm *vm, struct xe_vma_op *op)
case DRM_GPUVA_OP_REMAP:
prep_vma_destroy(vm, gpuva_to_vma(op->base.remap.unmap->va),
true);
- if (op->remap.prev)
+
+ /* Adjust for partial unbind after removin VMA from VM */
+ op->base.remap.unmap->va->va.addr = op->remap.start;
+ op->base.remap.unmap->va->va.range = op->remap.range;
+
+ if (op->remap.prev) {
xe_vm_insert_vma(vm, op->remap.prev);
- if (op->remap.next)
+ if (op->remap.skip_prev)
+ op->remap.prev = NULL;
+ }
+ if (op->remap.next) {
xe_vm_insert_vma(vm, op->remap.next);
+ if (op->remap.skip_next)
+ op->remap.next = NULL;
+ }
break;
case DRM_GPUVA_OP_UNMAP:
prep_vma_destroy(vm, gpuva_to_vma(op->base.unmap.va), true);
@@ -2508,9 +2546,10 @@ static int __xe_vma_op_execute(struct xe_vm *vm, struct xe_vma *vma,
bool next = !!op->remap.next;
if (!op->remap.unmap_done) {
- vm->async_ops.munmap_rebind_inflight = true;
- if (prev || next)
+ if (prev || next) {
+ vm->async_ops.munmap_rebind_inflight = true;
vma->gpuva.flags |= XE_VMA_FIRST_REBIND;
+ }
err = xe_vm_unbind(vm, vma, op->engine, op->syncs,
op->num_syncs,
!prev && !next ? op->fence : NULL,
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index 357f887b22ea..21c46b71b7d8 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -30,6 +30,9 @@ struct xe_vm;
#define XE_VMA_FIRST_REBIND (DRM_GPUVA_USERBITS << 3)
#define XE_VMA_LAST_REBIND (DRM_GPUVA_USERBITS << 4)
#define XE_VMA_NULL (DRM_GPUVA_USERBITS << 5)
+#define XE_VMA_PTE_4K (DRM_GPUVA_USERBITS << 6)
+#define XE_VMA_PTE_2M (DRM_GPUVA_USERBITS << 7)
+#define XE_VMA_PTE_1G (DRM_GPUVA_USERBITS << 8)
struct xe_vma {
/** @gpuva: Base GPUVA object */
@@ -317,14 +320,6 @@ struct xe_vma_op_map {
bool null;
};
-/** struct xe_vma_op_unmap - VMA unmap operation */
-struct xe_vma_op_unmap {
- /** @start: start of the VMA unmap */
- u64 start;
- /** @range: range of the VMA unmap */
- u64 range;
-};
-
/** struct xe_vma_op_remap - VMA remap operation */
struct xe_vma_op_remap {
/** @prev: VMA preceding part of a split mapping */
@@ -335,6 +330,10 @@ struct xe_vma_op_remap {
u64 start;
/** @range: range of the VMA unmap */
u64 range;
+ /** @skip_prev: skip prev rebind */
+ bool skip_prev;
+ /** @skip_next: skip next rebind */
+ bool skip_next;
/** @unmap_done: unmap operation in done */
bool unmap_done;
};
@@ -390,8 +389,6 @@ struct xe_vma_op {
union {
/** @map: VMA map operation specific data */
struct xe_vma_op_map map;
- /** @unmap: VMA unmap operation specific data */
- struct xe_vma_op_unmap unmap;
/** @remap: VMA remap operation specific data */
struct xe_vma_op_remap remap;
/** @prefetch: VMA prefetch operation specific data */
--
2.34.1
next prev parent reply other threads:[~2023-04-04 1:42 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-04 1:42 [Intel-xe] [PATCH v5 0/8] Port Xe to use GPUVA and implement NULL VM binds Matthew Brost
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 1/8] maple_tree: split up MA_STATE() macro Matthew Brost
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 2/8] maple_tree: Export mas_preallocate Matthew Brost
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 3/8] drm: manager to keep track of GPUs VA mappings Matthew Brost
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 4/8] drm/xe: Port Xe to GPUVA Matthew Brost
2023-04-21 12:52 ` Thomas Hellström
2023-04-21 12:56 ` Thomas Hellström
2023-04-21 14:54 ` Thomas Hellström
2023-04-25 11:41 ` Thomas Hellström
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 5/8] drm/xe: NULL binding implementation Matthew Brost
2023-04-04 1:42 ` Matthew Brost [this message]
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 7/8] drm/xe: Reduce the number list links in xe_vma Matthew Brost
2023-04-04 1:42 ` [Intel-xe] [PATCH v5 8/8] drm/xe: Optimize size of xe_vma allocation Matthew Brost
2023-04-04 1:44 ` [Intel-xe] ✓ CI.Patch_applied: success for Port Xe to use GPUVA and implement NULL VM binds (rev5) Patchwork
2023-04-04 1:45 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-04-04 1:49 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-04-04 2:09 ` [Intel-xe] ○ CI.BAT: info " Patchwork
2023-04-04 13:20 ` [Intel-xe] [PATCH v5 0/8] Port Xe to use GPUVA and implement NULL VM binds Thomas Hellström
2023-04-04 14:56 ` Matthew Brost
2023-04-05 15:31 ` Thomas Hellström
2023-04-06 1:20 ` Matthew Brost
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