From: Aravind Iddamsetty <aravind.iddamsetty@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Cc: rodrigo.vivi@intel.com
Subject: [Intel-xe] [PATCH v6 0/3] drm/xe/pmu: Enable PMU interface
Date: Fri, 1 Sep 2023 12:36:45 +0530 [thread overview]
Message-ID: <20230901070648.1100049-1-aravind.iddamsetty@linux.intel.com> (raw)
There are a set of engine group busyness counters provided by HW which are
perfect fit to be exposed via PMU perf events.
BSPEC: 46559, 46560, 46722, 46729, 52071, 71028
events can be listed using:
perf list
xe_0000_03_00.0/any-engine-group-busy-gt0/ [Kernel PMU event]
xe_0000_03_00.0/copy-group-busy-gt0/ [Kernel PMU event]
xe_0000_03_00.0/interrupts/ [Kernel PMU event]
xe_0000_03_00.0/media-group-busy-gt0/ [Kernel PMU event]
xe_0000_03_00.0/render-group-busy-gt0/ [Kernel PMU event]
and can be read using:
perf stat -e "xe_0000_8c_00.0/render-group-busy-gt0/" -I 1000
time counts unit events
1.001139062 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
2.003294678 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
3.005199582 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
4.007076497 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
5.008553068 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
6.010531563 43520 ns xe_0000_8c_00.0/render-group-busy-gt0/
7.012468029 44800 ns xe_0000_8c_00.0/render-group-busy-gt0/
8.013463515 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
9.015300183 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
10.017233010 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
10.971934120 0 ns xe_0000_8c_00.0/render-group-busy-gt0/
The pmu base implementation is taken from i915.
v6:
1. drop engine_busyness_sample_type
2. update UAPI documentation
v5:
1. Use spinlock in forcewake instead of mutex
2. take forcewake when accessing the OAG registers
v4: minor nits.
v3:
1. drop init_samples, as storing counters before going to suspend should
be sufficient.
2. ported the "drm/i915/pmu: Make PMU sample array two-dimensional" and
dropped helpers to store and read samples.
3. use xe_device_mem_access_get_if_ongoing to check if device is active
before reading the OA registers.
4. dropped format attr as no longer needed
5. introduce xe_pmu_suspend to call engine_group_busyness_store
6. few other nits.
v2:
Store last known value when device is awake return that while the GT is
suspended and then update the driver copy when read during awake.
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Aravind Iddamsetty (3):
drm/xe: Get GT clock to nanosecs
drm/xe: Use spinlock in forcewake instead of mutex
drm/xe/pmu: Enable PMU interface
drivers/gpu/drm/xe/Makefile | 2 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 5 +
drivers/gpu/drm/xe/xe_device.c | 2 +
drivers/gpu/drm/xe/xe_device_types.h | 4 +
drivers/gpu/drm/xe/xe_force_wake.c | 14 +-
drivers/gpu/drm/xe/xe_force_wake_types.h | 2 +-
drivers/gpu/drm/xe/xe_gt.c | 2 +
drivers/gpu/drm/xe/xe_gt_clock.c | 5 +
drivers/gpu/drm/xe/xe_gt_clock.h | 4 +-
drivers/gpu/drm/xe/xe_irq.c | 18 +
drivers/gpu/drm/xe/xe_module.c | 5 +
drivers/gpu/drm/xe/xe_pmu.c | 661 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_pmu.h | 25 +
drivers/gpu/drm/xe/xe_pmu_types.h | 76 +++
include/uapi/drm/xe_drm.h | 39 ++
15 files changed, 855 insertions(+), 9 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_pmu.c
create mode 100644 drivers/gpu/drm/xe/xe_pmu.h
create mode 100644 drivers/gpu/drm/xe/xe_pmu_types.h
--
2.25.1
next reply other threads:[~2023-09-01 6:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-01 7:06 Aravind Iddamsetty [this message]
2023-09-01 7:06 ` [Intel-xe] [PATCH v3 1/3] drm/xe: Get GT clock to nanosecs Aravind Iddamsetty
2023-09-01 7:06 ` [Intel-xe] [PATCH 2/3] drm/xe: Use spinlock in forcewake instead of mutex Aravind Iddamsetty
2023-09-01 7:06 ` [Intel-xe] [PATCH v6 3/3] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-09-02 5:00 ` Dixit, Ashutosh
2023-09-14 4:41 ` Aravind Iddamsetty
2023-09-14 5:16 ` Dixit, Ashutosh
2023-09-14 5:38 ` Aravind Iddamsetty
2023-09-01 7:28 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe/pmu: Enable PMU interface (rev6) Patchwork
2023-09-01 7:29 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-09-01 7:30 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-09-01 7:37 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-09-01 7:37 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-09-01 7:37 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-09-01 8:11 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
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