From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: <intel-xe@lists.freedesktop.org>, <igt-dev@lists.freedesktop.org>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [Intel-xe] [PATCH i-g-t 05/16] xe_exec_balancer: Enable parallel submission and compute mode
Date: Tue, 19 Sep 2023 10:19:48 -0400 [thread overview]
Message-ID: <20230919142000.91363-6-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20230919142000.91363-1-rodrigo.vivi@intel.com>
From: Matthew Brost <matthew.brost@intel.com>
This is now supported. Test it.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
tests/intel/xe_exec_balancer.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/tests/intel/xe_exec_balancer.c b/tests/intel/xe_exec_balancer.c
index 0314b4cd2..a4a438db7 100644
--- a/tests/intel/xe_exec_balancer.c
+++ b/tests/intel/xe_exec_balancer.c
@@ -383,6 +383,12 @@ test_exec(int fd, int gt, int class, int n_exec_queues, int n_execs,
* @virtual-userptr-rebind: virtual userptr rebind
* @virtual-userptr-invalidate: virtual userptr invalidate
* @virtual-userptr-invalidate-race: virtual userptr invalidate racy
+ * @parallel-basic: parallel basic
+ * @parallel-userptr: parallel userptr
+ * @parallel-rebind: parallel rebind
+ * @parallel-userptr-rebind: parallel userptr rebind
+ * @parallel-userptr-invalidate: parallel userptr invalidate
+ * @parallel-userptr-invalidate-race: parallel userptr invalidate racy
*/
static void
@@ -460,8 +466,8 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
};
struct drm_xe_exec_queue_create create = {
.vm_id = vm,
- .width = 1,
- .num_placements = num_placements,
+ .width = flags & PARALLEL ? num_placements : 1,
+ .num_placements = flags & PARALLEL ? 1 : num_placements,
.instances = to_user_pointer(eci),
.extensions = to_user_pointer(&ext),
};
@@ -470,6 +476,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
&create), 0);
exec_queues[i] = create.exec_queue_id;
}
+ exec.num_batch_buffer = flags & PARALLEL ? num_placements : 1;
sync[0].addr = to_user_pointer(&data[0].vm_sync);
if (bo)
@@ -487,8 +494,12 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
uint64_t batch_addr = addr + batch_offset;
uint64_t sdi_offset = (char *)&data[i].data - (char *)data;
uint64_t sdi_addr = addr + sdi_offset;
+ uint64_t batches[MAX_INSTANCE];
int e = i % n_exec_queues;
+ for (j = 0; j < num_placements && flags & PARALLEL; ++j)
+ batches[j] = batch_addr;
+
b = 0;
data[i].batch[b++] = MI_STORE_DWORD_IMM_GEN4;
data[i].batch[b++] = sdi_addr;
@@ -500,7 +511,8 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
sync[0].addr = addr + (char *)&data[i].exec_sync - (char *)data;
exec.exec_queue_id = exec_queues[e];
- exec.address = batch_addr;
+ exec.address = flags & PARALLEL ?
+ to_user_pointer(batches) : batch_addr;
xe_exec(fd, &exec);
if (flags & REBIND && i + 1 != n_execs) {
@@ -661,9 +673,6 @@ igt_main
test_exec(fd, gt, class, 1, 0,
s->flags);
- if (s->flags & PARALLEL)
- continue;
-
igt_subtest_f("once-cm-%s", s->name)
xe_for_each_gt(fd, gt)
xe_for_each_hw_engine_class(class)
--
2.41.0
next prev parent reply other threads:[~2023-09-19 14:25 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-19 14:19 [Intel-xe] [PATCH i-g-t 00/16] uAPI Alignment - take 1 Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 01/16] drm-uapi/xe_drm: Align with new PMU interface Rodrigo Vivi
2023-09-20 8:28 ` Aravind Iddamsetty
2023-09-20 19:15 ` Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 02/16] tests/intel/xe_query: Add a test for querying cs cycles Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 03/16] drm-uapi/xe_drm: Separate VM_BIND's operation and flag, align with latest uapi Rodrigo Vivi
2023-09-19 15:31 ` [Intel-xe] [igt-dev] " Matthew Brost
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 04/16] drm-uapi/xe_drm: Remove MMIO ioctl and " Rodrigo Vivi
2023-09-19 14:19 ` Rodrigo Vivi [this message]
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 06/16] xe_exec_threads: Use DRM_XE_VM_CREATE_COMPUTE_MODE when creating a compute VM Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 07/16] xe: Update uAPI and remove XE_EXEC_QUEUE_SET_PROPERTY_COMPUTE_MODE Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 08/16] drm-uapi/xe: Use common drm_xe_ext_set_property extension Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 09/16] drm-uapi: Kill XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS extension Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 10/16] drm-uapi/xe: Replace useless 'instance' per unique gt_id Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 11/16] drm-uapi/xe: Remove unused field of drm_xe_query_gt Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 12/16] drm-uapi/xe: Rename gts to gt_list Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 13/16] drm-uapi/xe: Fix naming of XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 14/16] drm-uapi/xe: Align with documentation updates Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 15/16] drm-uapi/xe: Align with Crystal Reference Clock updates Rodrigo Vivi
2023-09-19 14:19 ` [Intel-xe] [PATCH i-g-t 16/16] drm-uapi/xe: Align with extension of drm_xe_vm_bind_op Rodrigo Vivi
2023-09-19 14:43 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - take 1 Patchwork
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