From: Alexander Usyskin <alexander.usyskin@intel.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Lucas De Marchi <lucas.demarchi@intel.com>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: linux-kernel@vger.kernel.org,
Tomas Winkler <tomas.winkler@intel.com>,
Alexander Usyskin <alexander.usyskin@intel.com>,
intel-xe@lists.freedesktop.org
Subject: [Intel-xe] [PATCH v3 2/4] drm/xe/gsc: add has_heci_gscfi indication to device
Date: Wed, 20 Sep 2023 12:19:21 +0300 [thread overview]
Message-ID: <20230920091923.1573873-3-alexander.usyskin@intel.com> (raw)
In-Reply-To: <20230920091923.1573873-1-alexander.usyskin@intel.com>
From: Vitaly Lubart <vitaly.lubart@intel.com>
Mark support of MEI-GSC interaction per device.
Add has_heci_gscfi indication to xe_device and xe_pci structures.
Mark DG1 and DG2 devices as supported.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
drivers/gpu/drm/xe/xe_device_types.h | 3 +++
drivers/gpu/drm/xe/xe_pci.c | 9 +++++++--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 750e1f0d3339..1d1fe53fc30d 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -32,6 +32,7 @@ struct xe_ggtt;
#define GRAPHICS_VERx100(xe) ((xe)->info.graphics_verx100)
#define MEDIA_VERx100(xe) ((xe)->info.media_verx100)
#define IS_DGFX(xe) ((xe)->info.is_dgfx)
+#define HAS_HECI_GSCFI(xe) ((xe)->info.has_heci_gscfi)
#define XE_VRAM_FLAGS_NEED64K BIT(0)
@@ -237,6 +238,8 @@ struct xe_device {
u8 has_link_copy_engine:1;
/** @enable_display: display enabled */
u8 enable_display:1;
+ /** @has_heci_gscfi: device has heci gscfi */
+ u8 has_heci_gscfi:1;
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
const struct intel_display_device_info *display;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index dc233a1226bd..145eaa430d74 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -57,6 +57,7 @@ struct xe_device_desc {
u8 require_force_probe:1;
u8 is_dgfx:1;
u8 has_display:1;
+ u8 has_heci_gscfi:1;
u8 has_llc:1;
};
@@ -265,6 +266,7 @@ static const struct xe_device_desc dg1_desc = {
PLATFORM(XE_DG1),
.has_display = true,
.require_force_probe = true,
+ .has_heci_gscfi = 1,
};
static const u16 dg2_g10_ids[] = { XE_DG2_G10_IDS(NOP), XE_ATS_M150_IDS(NOP), 0 };
@@ -274,6 +276,7 @@ static const u16 dg2_g12_ids[] = { XE_DG2_G12_IDS(NOP), 0 };
#define DG2_FEATURES \
DGFX_FEATURES, \
PLATFORM(XE_DG2), \
+ .has_heci_gscfi = 1, \
.subplatforms = (const struct xe_subplatform_desc[]) { \
{ XE_SUBPLATFORM_DG2_G10, "G10", dg2_g10_ids }, \
{ XE_SUBPLATFORM_DG2_G11, "G11", dg2_g11_ids }, \
@@ -562,6 +565,7 @@ static int xe_info_init(struct xe_device *xe,
return -ENODEV;
xe->info.is_dgfx = desc->is_dgfx;
+ xe->info.has_heci_gscfi = desc->has_heci_gscfi;
xe->info.graphics_name = graphics_desc->name;
xe->info.media_name = media_desc ? media_desc->name : "none";
xe->info.has_llc = desc->has_llc;
@@ -703,7 +707,7 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
xe_display_info_init(xe);
- drm_dbg(&xe->drm, "%s %s %04x:%04x dgfx:%d gfx:%s (%d.%02d) media:%s (%d.%02d) display:%s dma_m_s:%d tc:%d",
+ drm_dbg(&xe->drm, "%s %s %04x:%04x dgfx:%d gfx:%s (%d.%02d) media:%s (%d.%02d) display:%s dma_m_s:%d tc:%d gscfi:%d",
desc->platform_name,
subplatform_desc ? subplatform_desc->name : "",
xe->info.devid, xe->info.revid,
@@ -715,7 +719,8 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
xe->info.media_verx100 / 100,
xe->info.media_verx100 % 100,
str_yes_no(xe->info.enable_display),
- xe->info.dma_mask_size, xe->info.tile_count);
+ xe->info.dma_mask_size, xe->info.tile_count,
+ xe->info.has_heci_gscfi);
drm_dbg(&xe->drm, "Stepping = (G:%s, M:%s, D:%s, B:%s)\n",
xe_step_name(xe->info.step.graphics),
--
2.34.1
next prev parent reply other threads:[~2023-09-20 9:23 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 9:19 [Intel-xe] [PATCH v3 0/4] drm/xe/gsc: add initial gsc support Alexander Usyskin
2023-09-20 9:19 ` [Intel-xe] [PATCH v3 1/4] drm/xe/gsc: add HECI2 register offsets Alexander Usyskin
2023-09-20 9:19 ` Alexander Usyskin [this message]
2023-09-20 9:19 ` [Intel-xe] [PATCH v3 3/4] drm/xe/gsc: add gsc device support Alexander Usyskin
2023-09-20 9:19 ` [Intel-xe] [PATCH v3 4/4] mei: gsc: add support for auxiliary device created by Xe driver Alexander Usyskin
2023-09-20 9:39 ` [Intel-xe] ✗ CI.Patch_applied: failure for drm/xe/gsc: add initial gsc support (rev3) Patchwork
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