From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32951C5475B for ; Fri, 8 Mar 2024 05:07:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E1CE710FAE6; Fri, 8 Mar 2024 05:07:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="EbifGrBV"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0937110FB99 for ; Fri, 8 Mar 2024 05:07:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709874473; x=1741410473; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iinZRW1Big5NQPhBD+/rLWTAOCSpKcVHn8FcrBfeGwo=; b=EbifGrBVcL+Lk5Y9gwkYi4pdpfIQIApvJ5RtCR3PSxG9zq5dXOC6JnLJ /s418/SeFw7hlSeB/cJFqFhNBk4SWwqT2S+s73V+dQcMKhQQIKncpAUHu KNmpHE1nsHADXpne8w5DfgkOQXKRkXhLuAYSgqF8uxvzpzCISrEfQxd8i BrwBT1kv80/fQfZFnmN1FJKWcT0vV6Lwr5S/AMSh1YeDOePRbTX66Glwf 9kq/9+MQEOaunlUwlEh4z6aC5WLDoNd9Suu80aGD/EyW0573n3i1TjDtf pixMc6z+1/TYLK1auy2ZF7qrEUetJmWBIKLjga70lh6OU142/ggszZFgj w==; X-IronPort-AV: E=McAfee;i="6600,9927,11006"; a="4761957" X-IronPort-AV: E=Sophos;i="6.07,108,1708416000"; d="scan'208";a="4761957" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2024 21:07:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,108,1708416000"; d="scan'208";a="10402973" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2024 21:07:51 -0800 From: Matthew Brost To: Cc: Matthew Brost Subject: [PATCH v4 03/30] drm/xe: Move migrate to prefetch to op_lock function Date: Thu, 7 Mar 2024 21:07:39 -0800 Message-Id: <20240308050806.577176-4-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240308050806.577176-1-matthew.brost@intel.com> References: <20240308050806.577176-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Migrates need to be done under drm exec to make lockdep happy, move the migrate done for prefetches under the op_lock function. Signed-off-by: Matthew Brost --- drivers/gpu/drm/xe/xe_vm.c | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index fb73afcab3b7..70a5ba621e4e 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -1994,20 +1994,10 @@ static const u32 region_to_mem_type[] = { static struct dma_fence * xe_vm_prefetch(struct xe_vm *vm, struct xe_vma *vma, - struct xe_exec_queue *q, u32 region, - struct xe_sync_entry *syncs, u32 num_syncs, - bool first_op, bool last_op) + struct xe_exec_queue *q, struct xe_sync_entry *syncs, + u32 num_syncs, bool first_op, bool last_op) { struct xe_exec_queue *wait_exec_queue = to_wait_exec_queue(vm, q); - int err; - - xe_assert(vm->xe, region <= ARRAY_SIZE(region_to_mem_type)); - - if (!xe_vma_has_no_bo(vma)) { - err = xe_bo_migrate(xe_vma_bo(vma), region_to_mem_type[region]); - if (err) - return ERR_PTR(err); - } if (vma->tile_mask != (vma->tile_present & ~vma->usm.tile_invalidated)) { return xe_vm_bind(vm, vma, q, xe_vma_bo(vma), syncs, num_syncs, @@ -2540,8 +2530,7 @@ static struct dma_fence *op_execute(struct xe_vm *vm, struct xe_vma *vma, op->flags & XE_VMA_OP_LAST); break; case DRM_GPUVA_OP_PREFETCH: - fence = xe_vm_prefetch(vm, vma, op->q, op->prefetch.region, - op->syncs, op->num_syncs, + fence = xe_vm_prefetch(vm, vma, op->q, op->syncs, op->num_syncs, op->flags & XE_VMA_OP_FIRST, op->flags & XE_VMA_OP_LAST); break; @@ -2766,8 +2755,17 @@ static int op_lock(struct drm_exec *exec, struct xe_vm *vm, err = vma_lock(exec, gpuva_to_vma(op->base.unmap.va), false); break; case DRM_GPUVA_OP_PREFETCH: - err = vma_lock(exec, gpuva_to_vma(op->base.prefetch.va), true); + { + struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va); + u32 region = op->prefetch.region; + + xe_assert(vm->xe, region <= ARRAY_SIZE(region_to_mem_type)); + + err = vma_lock(exec, vma, false); + if (!err && !xe_vma_has_no_bo(vma)) + err = xe_bo_migrate(xe_vma_bo(vma), region); break; + } default: drm_warn(&vm->xe->drm, "NOT POSSIBLE"); } -- 2.34.1