From: Ashutosh Dixit <ashutosh.dixit@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Subject: [PATCH] drm/xe: Label RING_CONTEXT_CONTROL as masked
Date: Wed, 3 Apr 2024 14:02:07 -0700 [thread overview]
Message-ID: <20240403210207.3839459-1-ashutosh.dixit@intel.com> (raw)
RING_CONTEXT_CONTROL is a masked register.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index a08528d9c76b..af71b87d8030 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -122,7 +122,7 @@
#define RING_EXECLIST_STATUS_LO(base) XE_REG((base) + 0x234)
#define RING_EXECLIST_STATUS_HI(base) XE_REG((base) + 0x234 + 4)
-#define RING_CONTEXT_CONTROL(base) XE_REG((base) + 0x244)
+#define RING_CONTEXT_CONTROL(base) XE_REG((base) + 0x244, XE_REG_OPTION_MASKED)
#define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH REG_BIT(3)
#define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT REG_BIT(0)
--
2.41.0
next reply other threads:[~2024-04-03 21:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 21:02 Ashutosh Dixit [this message]
2024-04-03 21:47 ` ✓ CI.Patch_applied: success for drm/xe: Label RING_CONTEXT_CONTROL as masked Patchwork
2024-04-03 21:48 ` ✓ CI.checkpatch: " Patchwork
2024-04-03 21:49 ` ✓ CI.KUnit: " Patchwork
2024-04-03 22:00 ` ✓ CI.Build: " Patchwork
2024-04-03 22:04 ` ✓ CI.Hooks: " Patchwork
2024-04-03 22:05 ` ✓ CI.checksparse: " Patchwork
2024-04-03 22:40 ` ✓ CI.BAT: " Patchwork
2024-04-03 23:00 ` [PATCH] " Matt Roper
2024-04-04 12:46 ` Lucas De Marchi
2024-04-04 16:18 ` Dixit, Ashutosh
-- strict thread matches above, loose matches on Subject: below --
2024-04-04 16:12 Ashutosh Dixit
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