From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B85B4CD1297 for ; Wed, 10 Apr 2024 05:41:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5DD4D113174; Wed, 10 Apr 2024 05:41:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YKxUfCxJ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id C7AA5113176 for ; Wed, 10 Apr 2024 05:40:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712727633; x=1744263633; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u4rNVimgTE6nSckHU8hE/NR1ZMlFpM5pYz5HyTmUBeI=; b=YKxUfCxJZyPhY3aQjhLzQp+DeFMX3+4qCz1pyROlvrFy7vWmPvAiW+Q/ mz70mGE/4+He5BiXAr7RTKnKmhe3WGFaKdvpLM7IVpcoA8bmMPbv1lFwC vgvqO4CQN/CLxxuF5plT1gSAAiFnwGSFkRASV8pKgOos3R/ZyUZRM7j0I Ylbnd2BkYDBr+YV2oRoMTXYxuqPzET+IzxgrlVjEWLuMLSKztN3M930Lf FTuwsW/pzzdUql5DXIBEf0szT4Yt9dBHqZo9XwJr/N4vzF70iIQaOQQEC KemlHXJS3dnSrsMqN15bo9raTgyh2uCwp4GWJTwJnCYddKkq4GJpnHndW A==; X-CSE-ConnectionGUID: 6I4xg4IsQ+CepcR12NgFGA== X-CSE-MsgGUID: 0G3Ej6siQK6xubA/9deNDg== X-IronPort-AV: E=McAfee;i="6600,9927,11039"; a="18680001" X-IronPort-AV: E=Sophos;i="6.07,190,1708416000"; d="scan'208";a="18680001" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2024 22:40:33 -0700 X-CSE-ConnectionGUID: uDGhE2lkSku2wjRggEJ68Q== X-CSE-MsgGUID: PBL6k6lrQWyshFamjCMgyQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,190,1708416000"; d="scan'208";a="20536826" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2024 22:40:33 -0700 From: Matthew Brost To: Cc: Matthew Brost , Oak Zeng Subject: [PATCH 03/13] drm/xe: Move migrate to prefetch to op_lock_and_prep function Date: Tue, 9 Apr 2024 22:40:46 -0700 Message-Id: <20240410054056.478023-4-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240410054056.478023-1-matthew.brost@intel.com> References: <20240410054056.478023-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" All non-binding operations in VM bind IOCTL should be in the lock and prepare step rather than the execution step. Move prefetch to conform to this pattern. v2: - Rebase - New function names (Oak) - Update stale comment (Oak) Cc: Oak Zeng Signed-off-by: Matthew Brost --- drivers/gpu/drm/xe/xe_vm.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 84c6b10b4b78..2c0521573154 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -2039,20 +2039,10 @@ static const u32 region_to_mem_type[] = { static struct dma_fence * xe_vm_prefetch(struct xe_vm *vm, struct xe_vma *vma, - struct xe_exec_queue *q, u32 region, - struct xe_sync_entry *syncs, u32 num_syncs, - bool first_op, bool last_op) + struct xe_exec_queue *q, struct xe_sync_entry *syncs, + u32 num_syncs, bool first_op, bool last_op) { struct xe_exec_queue *wait_exec_queue = to_wait_exec_queue(vm, q); - int err; - - xe_assert(vm->xe, region < ARRAY_SIZE(region_to_mem_type)); - - if (!xe_vma_has_no_bo(vma)) { - err = xe_bo_migrate(xe_vma_bo(vma), region_to_mem_type[region]); - if (err) - return ERR_PTR(err); - } if (vma->tile_mask != (vma->tile_present & ~vma->tile_invalidated)) { return xe_vm_bind(vm, vma, q, xe_vma_bo(vma), syncs, num_syncs, @@ -2592,8 +2582,7 @@ static struct dma_fence *op_execute(struct xe_vm *vm, struct xe_vma *vma, op->flags & XE_VMA_OP_LAST); break; case DRM_GPUVA_OP_PREFETCH: - fence = xe_vm_prefetch(vm, vma, op->q, op->prefetch.region, - op->syncs, op->num_syncs, + fence = xe_vm_prefetch(vm, vma, op->q, op->syncs, op->num_syncs, op->flags & XE_VMA_OP_FIRST, op->flags & XE_VMA_OP_LAST); break; @@ -2823,9 +2812,20 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm, false); break; case DRM_GPUVA_OP_PREFETCH: + { + struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va); + u32 region = op->prefetch.region; + + xe_assert(vm->xe, region <= ARRAY_SIZE(region_to_mem_type)); + err = vma_lock_and_validate(exec, - gpuva_to_vma(op->base.prefetch.va), true); + gpuva_to_vma(op->base.prefetch.va), + false); + if (!err && !xe_vma_has_no_bo(vma)) + err = xe_bo_migrate(xe_vma_bo(vma), + region_to_mem_type[region]); break; + } default: drm_warn(&vm->xe->drm, "NOT POSSIBLE"); } -- 2.34.1