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From: Matthew Brost <matthew.brost@intel.com>
To: <intel-xe@lists.freedesktop.org>
Cc: "Matthew Brost" <matthew.brost@intel.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: [RFC PATCH] drm/xe: Add TTM priority levels for single and multi placemnts
Date: Fri, 26 Apr 2024 14:06:28 -0700	[thread overview]
Message-ID: <20240426210628.2070068-1-matthew.brost@intel.com> (raw)

The simple idea being that we should try to evict BOs with multiple
placements first before BOs with a single placment.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c       | 4 +++-
 drivers/gpu/drm/xe/xe_bo.h       | 3 +++
 drivers/gpu/drm/xe/xe_bo_types.h | 3 ++-
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index bc1f794e3e61..1b96881ae84e 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1247,7 +1247,9 @@ struct xe_bo *___xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
 	bo->flags = flags;
 	bo->cpu_caching = cpu_caching;
 	bo->ttm.base.funcs = &xe_gem_object_funcs;
-	bo->ttm.priority = XE_BO_PRIORITY_NORMAL;
+	bo->ttm.priority = hweight32(flags & XE_BO_FLAG_PLACEMENTS_MASK) == 1 ?
+		XE_BO_PRIORITY_SINGLE_PLACEMENT :
+		XE_BO_PRIORITY_MULTI_PLACEMENT;
 	INIT_LIST_HEAD(&bo->pinned_link);
 #ifdef CONFIG_PROC_FS
 	INIT_LIST_HEAD(&bo->client_link);
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index a885b14bf595..c53c7286f1db 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -23,6 +23,9 @@
 #define XE_BO_FLAG_VRAM_MASK		(XE_BO_FLAG_VRAM0 | XE_BO_FLAG_VRAM1)
 /* -- */
 #define XE_BO_FLAG_STOLEN		BIT(4)
+#define XE_BO_FLAG_PLACEMENTS_MASK	(XE_BO_FLAG_SYSTEM | \
+					 XE_BO_FLAG_VRAM_MASK | \
+					 XE_BO_FLAG_STOLEN)
 #define XE_BO_FLAG_VRAM_IF_DGFX(tile)	(IS_DGFX(tile_to_xe(tile)) ? \
 					 XE_BO_FLAG_VRAM0 << (tile)->id : \
 					 XE_BO_FLAG_SYSTEM)
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 86422e113d39..ff71364feab3 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -20,7 +20,8 @@ struct xe_vm;
 #define XE_BO_MAX_PLACEMENTS	3
 
 /* TODO: To be selected with VM_MADVISE */
-#define	XE_BO_PRIORITY_NORMAL	1
+#define	XE_BO_PRIORITY_MULTI_PLACEMENT	1
+#define XE_BO_PRIORITY_SINGLE_PLACEMENT	2
 
 /** @xe_bo: XE buffer object */
 struct xe_bo {
-- 
2.34.1


             reply	other threads:[~2024-04-26 21:05 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-26 21:06 Matthew Brost [this message]
2024-04-26 21:10 ` ✓ CI.Patch_applied: success for drm/xe: Add TTM priority levels for single and multi placemnts Patchwork
2024-04-26 21:11 ` ✓ CI.checkpatch: " Patchwork
2024-04-26 21:12 ` ✓ CI.KUnit: " Patchwork

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